<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=Content-Type content="text/html; charset=iso-8859-1">
<STYLE type=text/css>
<!--
.blink {text-decoration:blink}
.ms  {font-size: 9pt; font-family: monospace; font-weight: normal}
.msb {font-size: 9pt; font-family: monospace; font-weight: bold  }
-->
</STYLE>
<META content="MSHTML 6.00.2900.2180" name=GENERATOR></HEAD>
<BODY><B>
</B>
<BR><PRE><A name="Report Header"></A>
--------------------------------------------------------------------------------
Lattice TRACE Report - Setup, Version Diamond (64-bit) 3.11.2.446
Mon Apr 06 16:34:57 2020

Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp.   All rights reserved.
Copyright (c) 1995-2001 Lucent Technologies Inc.  All rights reserved.
Copyright (c) 2001 Agere Systems   All rights reserved.
Copyright (c) 2002-2019 Lattice Semiconductor Corporation,  All rights reserved.

Report Information
------------------
Design file:     top
Device,speed:    LCMXO2-7000HE,4
Report level:    verbose report, limited to 10 items per preference
--------------------------------------------------------------------------------



</A><A name="FREQUENCY NET 'osc_clk' 88.670000 MH"></A>================================================================================
Preference: FREQUENCY NET "osc_clk" 88.670000 MHz ;
            10 items scored, 10 timing errors detected.
--------------------------------------------------------------------------------
<font color=#FF0000> 

Error: The following path exceeds requirements by 3.872ns
 </font>
 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:SLICE_2432">o_Rx_DV_40</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    FF         Data in        <A href="#@comp:SLICE_55">phase_inc_carrGen_i0_i63</A>  (to <A href="#@net:osc_clk">osc_clk</A> +)

   Delay:              15.021ns  (57.5% logic, 42.5% route), 35 logic levels.

 Constraint Details:

     15.021ns physical path delay SLICE_2432 to SLICE_55 exceeds
     11.278ns delay constraint less
     -0.037ns skew and
      0.166ns DIN_SET requirement (totaling 11.149ns) by 3.872ns

 Physical Path Details:

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:REG_DEL, 0.452,R21C8A.CLK,R21C8A.Q0,SLICE_2432:ROUTE, 1.298,R21C8A.Q0,R21C16C.C0,o_Rx_DV:CTOF_DEL, 0.495,R21C16C.C0,R21C16C.F0,SLICE_2476:ROUTE, 1.160,R21C16C.F0,R19C17D.C0,n8250:CTOF_DEL, 0.495,R19C17D.C0,R19C17D.F0,SLICE_2435:ROUTE, 0.675,R19C17D.F0,R19C15B.D1,n12533:CTOF_DEL, 0.495,R19C15B.D1,R19C15B.F1,SLICE_2394:ROUTE, 1.080,R19C15B.F1,R19C16C.B0,n13057:CTOF_DEL, 0.495,R19C16C.B0,R19C16C.F0,SLICE_2414:ROUTE, 2.174,R19C16C.F0,R19C2D.C0,n2358:C0TOFCO_DEL, 1.023,R19C2D.C0,R19C2D.FCO,SLICE_84:ROUTE, 0.000,R19C2D.FCO,R19C3A.FCI,n10981:FCITOFCO_DEL, 0.162,R19C3A.FCI,R19C3A.FCO,SLICE_83:ROUTE, 0.000,R19C3A.FCO,R19C3B.FCI,n10982:FCITOFCO_DEL, 0.162,R19C3B.FCI,R19C3B.FCO,SLICE_82:ROUTE, 0.000,R19C3B.FCO,R19C3C.FCI,n10983:FCITOFCO_DEL, 0.162,R19C3C.FCI,R19C3C.FCO,SLICE_81:ROUTE, 0.000,R19C3C.FCO,R19C3D.FCI,n10984:FCITOFCO_DEL, 0.162,R19C3D.FCI,R19C3D.FCO,SLICE_80:ROUTE, 0.000,R19C3D.FCO,R19C4A.FCI,n10985:FCITOFCO_DEL, 0.162,R19C4A.FCI,R19C4A.FCO,SLICE_79:ROUTE, 0.000,R19C4A.FCO,R19C4B.FCI,n10986:FCITOFCO_DEL, 0.162,R19C4B.FCI,R19C4B.FCO,SLICE_78:ROUTE, 0.000,R19C4B.FCO,R19C4C.FCI,n10987:FCITOFCO_DEL, 0.162,R19C4C.FCI,R19C4C.FCO,SLICE_77:ROUTE, 0.000,R19C4C.FCO,R19C4D.FCI,n10988:FCITOFCO_DEL, 0.162,R19C4D.FCI,R19C4D.FCO,SLICE_76:ROUTE, 0.000,R19C4D.FCO,R19C5A.FCI,n10989:FCITOFCO_DEL, 0.162,R19C5A.FCI,R19C5A.FCO,SLICE_75:ROUTE, 0.000,R19C5A.FCO,R19C5B.FCI,n10990:FCITOFCO_DEL, 0.162,R19C5B.FCI,R19C5B.FCO,SLICE_74:ROUTE, 0.000,R19C5B.FCO,R19C5C.FCI,n10991:FCITOFCO_DEL, 0.162,R19C5C.FCI,R19C5C.FCO,SLICE_73:ROUTE, 0.000,R19C5C.FCO,R19C5D.FCI,n10992:FCITOFCO_DEL, 0.162,R19C5D.FCI,R19C5D.FCO,SLICE_72:ROUTE, 0.000,R19C5D.FCO,R19C6A.FCI,n10993:FCITOFCO_DEL, 0.162,R19C6A.FCI,R19C6A.FCO,SLICE_71:ROUTE, 0.000,R19C6A.FCO,R19C6B.FCI,n10994:FCITOFCO_DEL, 0.162,R19C6B.FCI,R19C6B.FCO,SLICE_70:ROUTE, 0.000,R19C6B.FCO,R19C6C.FCI,n10995:FCITOFCO_DEL, 0.162,R19C6C.FCI,R19C6C.FCO,SLICE_69:ROUTE, 0.000,R19C6C.FCO,R19C6D.FCI,n10996:FCITOFCO_DEL, 0.162,R19C6D.FCI,R19C6D.FCO,SLICE_68:ROUTE, 0.000,R19C6D.FCO,R19C7A.FCI,n10997:FCITOFCO_DEL, 0.162,R19C7A.FCI,R19C7A.FCO,SLICE_67:ROUTE, 0.000,R19C7A.FCO,R19C7B.FCI,n10998:FCITOFCO_DEL, 0.162,R19C7B.FCI,R19C7B.FCO,SLICE_66:ROUTE, 0.000,R19C7B.FCO,R19C7C.FCI,n10999:FCITOFCO_DEL, 0.162,R19C7C.FCI,R19C7C.FCO,SLICE_65:ROUTE, 0.000,R19C7C.FCO,R19C7D.FCI,n11000:FCITOFCO_DEL, 0.162,R19C7D.FCI,R19C7D.FCO,SLICE_64:ROUTE, 0.000,R19C7D.FCO,R19C8A.FCI,n11001:FCITOFCO_DEL, 0.162,R19C8A.FCI,R19C8A.FCO,SLICE_63:ROUTE, 0.000,R19C8A.FCO,R19C8B.FCI,n11002:FCITOFCO_DEL, 0.162,R19C8B.FCI,R19C8B.FCO,SLICE_62:ROUTE, 0.000,R19C8B.FCO,R19C8C.FCI,n11003:FCITOFCO_DEL, 0.162,R19C8C.FCI,R19C8C.FCO,SLICE_61:ROUTE, 0.000,R19C8C.FCO,R19C8D.FCI,n11004:FCITOFCO_DEL, 0.162,R19C8D.FCI,R19C8D.FCO,SLICE_60:ROUTE, 0.000,R19C8D.FCO,R19C9A.FCI,n11005:FCITOFCO_DEL, 0.162,R19C9A.FCI,R19C9A.FCO,SLICE_59:ROUTE, 0.000,R19C9A.FCO,R19C9B.FCI,n11006:FCITOFCO_DEL, 0.162,R19C9B.FCI,R19C9B.FCO,SLICE_58:ROUTE, 0.000,R19C9B.FCO,R19C9C.FCI,n11007:FCITOFCO_DEL, 0.162,R19C9C.FCI,R19C9C.FCO,SLICE_57:ROUTE, 0.000,R19C9C.FCO,R19C9D.FCI,n11008:FCITOFCO_DEL, 0.162,R19C9D.FCI,R19C9D.FCO,SLICE_56:ROUTE, 0.000,R19C9D.FCO,R19C10A.FCI,n11009:FCITOF1_DEL, 0.643,R19C10A.FCI,R19C10A.F1,SLICE_55:ROUTE, 0.000,R19C10A.F1,R19C10A.DI1,n2817">Data path</A> SLICE_2432 to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452     R21C8A.CLK to      R21C8A.Q0 <A href="#@comp:SLICE_2432">SLICE_2432</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         4     1.298<A href="#@net:o_Rx_DV:R21C8A.Q0:R21C16C.C0:1.298">      R21C8A.Q0 to R21C16C.C0    </A> <A href="#@net:o_Rx_DV">o_Rx_DV</A>
CTOF_DEL    ---     0.495     R21C16C.C0 to     R21C16C.F0 <A href="#@comp:SLICE_2476">SLICE_2476</A>
ROUTE         4     1.160<A href="#@net:n8250:R21C16C.F0:R19C17D.C0:1.160">     R21C16C.F0 to R19C17D.C0    </A> <A href="#@net:n8250">n8250</A>
CTOF_DEL    ---     0.495     R19C17D.C0 to     R19C17D.F0 <A href="#@comp:SLICE_2435">SLICE_2435</A>
ROUTE         5     0.675<A href="#@net:n12533:R19C17D.F0:R19C15B.D1:0.675">     R19C17D.F0 to R19C15B.D1    </A> <A href="#@net:n12533">n12533</A>
CTOF_DEL    ---     0.495     R19C15B.D1 to     R19C15B.F1 <A href="#@comp:SLICE_2394">SLICE_2394</A>
ROUTE        52     1.080<A href="#@net:n13057:R19C15B.F1:R19C16C.B0:1.080">     R19C15B.F1 to R19C16C.B0    </A> <A href="#@net:n13057">n13057</A>
CTOF_DEL    ---     0.495     R19C16C.B0 to     R19C16C.F0 <A href="#@comp:SLICE_2414">SLICE_2414</A>
ROUTE         1     2.174<A href="#@net:n2358:R19C16C.F0:R19C2D.C0:2.174">     R19C16C.F0 to R19C2D.C0     </A> <A href="#@net:n2358">n2358</A>
C0TOFCO_DE  ---     1.023      R19C2D.C0 to     R19C2D.FCO <A href="#@comp:SLICE_84">SLICE_84</A>
ROUTE         1     0.000<A href="#@net:n10981:R19C2D.FCO:R19C3A.FCI:0.000">     R19C2D.FCO to R19C3A.FCI    </A> <A href="#@net:n10981">n10981</A>
FCITOFCO_D  ---     0.162     R19C3A.FCI to     R19C3A.FCO <A href="#@comp:SLICE_83">SLICE_83</A>
ROUTE         1     0.000<A href="#@net:n10982:R19C3A.FCO:R19C3B.FCI:0.000">     R19C3A.FCO to R19C3B.FCI    </A> <A href="#@net:n10982">n10982</A>
FCITOFCO_D  ---     0.162     R19C3B.FCI to     R19C3B.FCO <A href="#@comp:SLICE_82">SLICE_82</A>
ROUTE         1     0.000<A href="#@net:n10983:R19C3B.FCO:R19C3C.FCI:0.000">     R19C3B.FCO to R19C3C.FCI    </A> <A href="#@net:n10983">n10983</A>
FCITOFCO_D  ---     0.162     R19C3C.FCI to     R19C3C.FCO <A href="#@comp:SLICE_81">SLICE_81</A>
ROUTE         1     0.000<A href="#@net:n10984:R19C3C.FCO:R19C3D.FCI:0.000">     R19C3C.FCO to R19C3D.FCI    </A> <A href="#@net:n10984">n10984</A>
FCITOFCO_D  ---     0.162     R19C3D.FCI to     R19C3D.FCO <A href="#@comp:SLICE_80">SLICE_80</A>
ROUTE         1     0.000<A href="#@net:n10985:R19C3D.FCO:R19C4A.FCI:0.000">     R19C3D.FCO to R19C4A.FCI    </A> <A href="#@net:n10985">n10985</A>
FCITOFCO_D  ---     0.162     R19C4A.FCI to     R19C4A.FCO <A href="#@comp:SLICE_79">SLICE_79</A>
ROUTE         1     0.000<A href="#@net:n10986:R19C4A.FCO:R19C4B.FCI:0.000">     R19C4A.FCO to R19C4B.FCI    </A> <A href="#@net:n10986">n10986</A>
FCITOFCO_D  ---     0.162     R19C4B.FCI to     R19C4B.FCO <A href="#@comp:SLICE_78">SLICE_78</A>
ROUTE         1     0.000<A href="#@net:n10987:R19C4B.FCO:R19C4C.FCI:0.000">     R19C4B.FCO to R19C4C.FCI    </A> <A href="#@net:n10987">n10987</A>
FCITOFCO_D  ---     0.162     R19C4C.FCI to     R19C4C.FCO <A href="#@comp:SLICE_77">SLICE_77</A>
ROUTE         1     0.000<A href="#@net:n10988:R19C4C.FCO:R19C4D.FCI:0.000">     R19C4C.FCO to R19C4D.FCI    </A> <A href="#@net:n10988">n10988</A>
FCITOFCO_D  ---     0.162     R19C4D.FCI to     R19C4D.FCO <A href="#@comp:SLICE_76">SLICE_76</A>
ROUTE         1     0.000<A href="#@net:n10989:R19C4D.FCO:R19C5A.FCI:0.000">     R19C4D.FCO to R19C5A.FCI    </A> <A href="#@net:n10989">n10989</A>
FCITOFCO_D  ---     0.162     R19C5A.FCI to     R19C5A.FCO <A href="#@comp:SLICE_75">SLICE_75</A>
ROUTE         1     0.000<A href="#@net:n10990:R19C5A.FCO:R19C5B.FCI:0.000">     R19C5A.FCO to R19C5B.FCI    </A> <A href="#@net:n10990">n10990</A>
FCITOFCO_D  ---     0.162     R19C5B.FCI to     R19C5B.FCO <A href="#@comp:SLICE_74">SLICE_74</A>
ROUTE         1     0.000<A href="#@net:n10991:R19C5B.FCO:R19C5C.FCI:0.000">     R19C5B.FCO to R19C5C.FCI    </A> <A href="#@net:n10991">n10991</A>
FCITOFCO_D  ---     0.162     R19C5C.FCI to     R19C5C.FCO <A href="#@comp:SLICE_73">SLICE_73</A>
ROUTE         1     0.000<A href="#@net:n10992:R19C5C.FCO:R19C5D.FCI:0.000">     R19C5C.FCO to R19C5D.FCI    </A> <A href="#@net:n10992">n10992</A>
FCITOFCO_D  ---     0.162     R19C5D.FCI to     R19C5D.FCO <A href="#@comp:SLICE_72">SLICE_72</A>
ROUTE         1     0.000<A href="#@net:n10993:R19C5D.FCO:R19C6A.FCI:0.000">     R19C5D.FCO to R19C6A.FCI    </A> <A href="#@net:n10993">n10993</A>
FCITOFCO_D  ---     0.162     R19C6A.FCI to     R19C6A.FCO <A href="#@comp:SLICE_71">SLICE_71</A>
ROUTE         1     0.000<A href="#@net:n10994:R19C6A.FCO:R19C6B.FCI:0.000">     R19C6A.FCO to R19C6B.FCI    </A> <A href="#@net:n10994">n10994</A>
FCITOFCO_D  ---     0.162     R19C6B.FCI to     R19C6B.FCO <A href="#@comp:SLICE_70">SLICE_70</A>
ROUTE         1     0.000<A href="#@net:n10995:R19C6B.FCO:R19C6C.FCI:0.000">     R19C6B.FCO to R19C6C.FCI    </A> <A href="#@net:n10995">n10995</A>
FCITOFCO_D  ---     0.162     R19C6C.FCI to     R19C6C.FCO <A href="#@comp:SLICE_69">SLICE_69</A>
ROUTE         1     0.000<A href="#@net:n10996:R19C6C.FCO:R19C6D.FCI:0.000">     R19C6C.FCO to R19C6D.FCI    </A> <A href="#@net:n10996">n10996</A>
FCITOFCO_D  ---     0.162     R19C6D.FCI to     R19C6D.FCO <A href="#@comp:SLICE_68">SLICE_68</A>
ROUTE         1     0.000<A href="#@net:n10997:R19C6D.FCO:R19C7A.FCI:0.000">     R19C6D.FCO to R19C7A.FCI    </A> <A href="#@net:n10997">n10997</A>
FCITOFCO_D  ---     0.162     R19C7A.FCI to     R19C7A.FCO <A href="#@comp:SLICE_67">SLICE_67</A>
ROUTE         1     0.000<A href="#@net:n10998:R19C7A.FCO:R19C7B.FCI:0.000">     R19C7A.FCO to R19C7B.FCI    </A> <A href="#@net:n10998">n10998</A>
FCITOFCO_D  ---     0.162     R19C7B.FCI to     R19C7B.FCO <A href="#@comp:SLICE_66">SLICE_66</A>
ROUTE         1     0.000<A href="#@net:n10999:R19C7B.FCO:R19C7C.FCI:0.000">     R19C7B.FCO to R19C7C.FCI    </A> <A href="#@net:n10999">n10999</A>
FCITOFCO_D  ---     0.162     R19C7C.FCI to     R19C7C.FCO <A href="#@comp:SLICE_65">SLICE_65</A>
ROUTE         1     0.000<A href="#@net:n11000:R19C7C.FCO:R19C7D.FCI:0.000">     R19C7C.FCO to R19C7D.FCI    </A> <A href="#@net:n11000">n11000</A>
FCITOFCO_D  ---     0.162     R19C7D.FCI to     R19C7D.FCO <A href="#@comp:SLICE_64">SLICE_64</A>
ROUTE         1     0.000<A href="#@net:n11001:R19C7D.FCO:R19C8A.FCI:0.000">     R19C7D.FCO to R19C8A.FCI    </A> <A href="#@net:n11001">n11001</A>
FCITOFCO_D  ---     0.162     R19C8A.FCI to     R19C8A.FCO <A href="#@comp:SLICE_63">SLICE_63</A>
ROUTE         1     0.000<A href="#@net:n11002:R19C8A.FCO:R19C8B.FCI:0.000">     R19C8A.FCO to R19C8B.FCI    </A> <A href="#@net:n11002">n11002</A>
FCITOFCO_D  ---     0.162     R19C8B.FCI to     R19C8B.FCO <A href="#@comp:SLICE_62">SLICE_62</A>
ROUTE         1     0.000<A href="#@net:n11003:R19C8B.FCO:R19C8C.FCI:0.000">     R19C8B.FCO to R19C8C.FCI    </A> <A href="#@net:n11003">n11003</A>
FCITOFCO_D  ---     0.162     R19C8C.FCI to     R19C8C.FCO <A href="#@comp:SLICE_61">SLICE_61</A>
ROUTE         1     0.000<A href="#@net:n11004:R19C8C.FCO:R19C8D.FCI:0.000">     R19C8C.FCO to R19C8D.FCI    </A> <A href="#@net:n11004">n11004</A>
FCITOFCO_D  ---     0.162     R19C8D.FCI to     R19C8D.FCO <A href="#@comp:SLICE_60">SLICE_60</A>
ROUTE         1     0.000<A href="#@net:n11005:R19C8D.FCO:R19C9A.FCI:0.000">     R19C8D.FCO to R19C9A.FCI    </A> <A href="#@net:n11005">n11005</A>
FCITOFCO_D  ---     0.162     R19C9A.FCI to     R19C9A.FCO <A href="#@comp:SLICE_59">SLICE_59</A>
ROUTE         1     0.000<A href="#@net:n11006:R19C9A.FCO:R19C9B.FCI:0.000">     R19C9A.FCO to R19C9B.FCI    </A> <A href="#@net:n11006">n11006</A>
FCITOFCO_D  ---     0.162     R19C9B.FCI to     R19C9B.FCO <A href="#@comp:SLICE_58">SLICE_58</A>
ROUTE         1     0.000<A href="#@net:n11007:R19C9B.FCO:R19C9C.FCI:0.000">     R19C9B.FCO to R19C9C.FCI    </A> <A href="#@net:n11007">n11007</A>
FCITOFCO_D  ---     0.162     R19C9C.FCI to     R19C9C.FCO <A href="#@comp:SLICE_57">SLICE_57</A>
ROUTE         1     0.000<A href="#@net:n11008:R19C9C.FCO:R19C9D.FCI:0.000">     R19C9C.FCO to R19C9D.FCI    </A> <A href="#@net:n11008">n11008</A>
FCITOFCO_D  ---     0.162     R19C9D.FCI to     R19C9D.FCO <A href="#@comp:SLICE_56">SLICE_56</A>
ROUTE         1     0.000<A href="#@net:n11009:R19C9D.FCO:R19C10A.FCI:0.000">     R19C9D.FCO to R19C10A.FCI   </A> <A href="#@net:n11009">n11009</A>
FCITOF1_DE  ---     0.643    R19C10A.FCI to     R19C10A.F1 <A href="#@comp:SLICE_55">SLICE_55</A>
ROUTE         1     0.000<A href="#@net:n2817:R19C10A.F1:R19C10A.DI1:0.000">     R19C10A.F1 to R19C10A.DI1   </A> <A href="#@net:n2817">n2817</A> (to <A href="#@net:osc_clk">osc_clk</A>)
                  --------
                   15.021   (57.5% logic, 42.5% route), 35 logic levels.

 Clock Skew Details: 

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.162,OSC.OSC,R21C8A.CLK,osc_clk">Source Clock Path</A> OSCH_inst to SLICE_2432:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.162<A href="#@net:osc_clk:OSC.OSC:R21C8A.CLK:4.162">        OSC.OSC to R21C8A.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.162   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.199,OSC.OSC,R19C10A.CLK,osc_clk">Destination Clock Path</A> OSCH_inst to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R19C10A.CLK:4.199">        OSC.OSC to R19C10A.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.
<font color=#FF0000> 

Error: The following path exceeds requirements by 3.818ns
 </font>
 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:SLICE_2432">o_Rx_DV_40</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    FF         Data in        <A href="#@comp:SLICE_55">phase_inc_carrGen_i0_i63</A>  (to <A href="#@net:osc_clk">osc_clk</A> +)

   Delay:              14.967ns  (59.0% logic, 41.0% route), 37 logic levels.

 Constraint Details:

     14.967ns physical path delay SLICE_2432 to SLICE_55 exceeds
     11.278ns delay constraint less
     -0.037ns skew and
      0.166ns DIN_SET requirement (totaling 11.149ns) by 3.818ns

 Physical Path Details:

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:REG_DEL, 0.452,R21C8A.CLK,R21C8A.Q0,SLICE_2432:ROUTE, 1.298,R21C8A.Q0,R21C16C.C0,o_Rx_DV:CTOF_DEL, 0.495,R21C16C.C0,R21C16C.F0,SLICE_2476:ROUTE, 1.160,R21C16C.F0,R19C17D.C0,n8250:CTOF_DEL, 0.495,R19C17D.C0,R19C17D.F0,SLICE_2435:ROUTE, 0.675,R19C17D.F0,R19C15B.D1,n12533:CTOF_DEL, 0.495,R19C15B.D1,R19C15B.F1,SLICE_2394:ROUTE, 1.335,R19C15B.F1,R19C10C.C0,n13057:CTOF_DEL, 0.495,R19C10C.C0,R19C10C.F0,SLICE_2418:ROUTE, 1.675,R19C10C.F0,R19C2B.C1,n2361:C1TOFCO_DEL, 0.889,R19C2B.C1,R19C2B.FCO,SLICE_86:ROUTE, 0.000,R19C2B.FCO,R19C2C.FCI,n10979:FCITOFCO_DEL, 0.162,R19C2C.FCI,R19C2C.FCO,SLICE_85:ROUTE, 0.000,R19C2C.FCO,R19C2D.FCI,n10980:FCITOFCO_DEL, 0.162,R19C2D.FCI,R19C2D.FCO,SLICE_84:ROUTE, 0.000,R19C2D.FCO,R19C3A.FCI,n10981:FCITOFCO_DEL, 0.162,R19C3A.FCI,R19C3A.FCO,SLICE_83:ROUTE, 0.000,R19C3A.FCO,R19C3B.FCI,n10982:FCITOFCO_DEL, 0.162,R19C3B.FCI,R19C3B.FCO,SLICE_82:ROUTE, 0.000,R19C3B.FCO,R19C3C.FCI,n10983:FCITOFCO_DEL, 0.162,R19C3C.FCI,R19C3C.FCO,SLICE_81:ROUTE, 0.000,R19C3C.FCO,R19C3D.FCI,n10984:FCITOFCO_DEL, 0.162,R19C3D.FCI,R19C3D.FCO,SLICE_80:ROUTE, 0.000,R19C3D.FCO,R19C4A.FCI,n10985:FCITOFCO_DEL, 0.162,R19C4A.FCI,R19C4A.FCO,SLICE_79:ROUTE, 0.000,R19C4A.FCO,R19C4B.FCI,n10986:FCITOFCO_DEL, 0.162,R19C4B.FCI,R19C4B.FCO,SLICE_78:ROUTE, 0.000,R19C4B.FCO,R19C4C.FCI,n10987:FCITOFCO_DEL, 0.162,R19C4C.FCI,R19C4C.FCO,SLICE_77:ROUTE, 0.000,R19C4C.FCO,R19C4D.FCI,n10988:FCITOFCO_DEL, 0.162,R19C4D.FCI,R19C4D.FCO,SLICE_76:ROUTE, 0.000,R19C4D.FCO,R19C5A.FCI,n10989:FCITOFCO_DEL, 0.162,R19C5A.FCI,R19C5A.FCO,SLICE_75:ROUTE, 0.000,R19C5A.FCO,R19C5B.FCI,n10990:FCITOFCO_DEL, 0.162,R19C5B.FCI,R19C5B.FCO,SLICE_74:ROUTE, 0.000,R19C5B.FCO,R19C5C.FCI,n10991:FCITOFCO_DEL, 0.162,R19C5C.FCI,R19C5C.FCO,SLICE_73:ROUTE, 0.000,R19C5C.FCO,R19C5D.FCI,n10992:FCITOFCO_DEL, 0.162,R19C5D.FCI,R19C5D.FCO,SLICE_72:ROUTE, 0.000,R19C5D.FCO,R19C6A.FCI,n10993:FCITOFCO_DEL, 0.162,R19C6A.FCI,R19C6A.FCO,SLICE_71:ROUTE, 0.000,R19C6A.FCO,R19C6B.FCI,n10994:FCITOFCO_DEL, 0.162,R19C6B.FCI,R19C6B.FCO,SLICE_70:ROUTE, 0.000,R19C6B.FCO,R19C6C.FCI,n10995:FCITOFCO_DEL, 0.162,R19C6C.FCI,R19C6C.FCO,SLICE_69:ROUTE, 0.000,R19C6C.FCO,R19C6D.FCI,n10996:FCITOFCO_DEL, 0.162,R19C6D.FCI,R19C6D.FCO,SLICE_68:ROUTE, 0.000,R19C6D.FCO,R19C7A.FCI,n10997:FCITOFCO_DEL, 0.162,R19C7A.FCI,R19C7A.FCO,SLICE_67:ROUTE, 0.000,R19C7A.FCO,R19C7B.FCI,n10998:FCITOFCO_DEL, 0.162,R19C7B.FCI,R19C7B.FCO,SLICE_66:ROUTE, 0.000,R19C7B.FCO,R19C7C.FCI,n10999:FCITOFCO_DEL, 0.162,R19C7C.FCI,R19C7C.FCO,SLICE_65:ROUTE, 0.000,R19C7C.FCO,R19C7D.FCI,n11000:FCITOFCO_DEL, 0.162,R19C7D.FCI,R19C7D.FCO,SLICE_64:ROUTE, 0.000,R19C7D.FCO,R19C8A.FCI,n11001:FCITOFCO_DEL, 0.162,R19C8A.FCI,R19C8A.FCO,SLICE_63:ROUTE, 0.000,R19C8A.FCO,R19C8B.FCI,n11002:FCITOFCO_DEL, 0.162,R19C8B.FCI,R19C8B.FCO,SLICE_62:ROUTE, 0.000,R19C8B.FCO,R19C8C.FCI,n11003:FCITOFCO_DEL, 0.162,R19C8C.FCI,R19C8C.FCO,SLICE_61:ROUTE, 0.000,R19C8C.FCO,R19C8D.FCI,n11004:FCITOFCO_DEL, 0.162,R19C8D.FCI,R19C8D.FCO,SLICE_60:ROUTE, 0.000,R19C8D.FCO,R19C9A.FCI,n11005:FCITOFCO_DEL, 0.162,R19C9A.FCI,R19C9A.FCO,SLICE_59:ROUTE, 0.000,R19C9A.FCO,R19C9B.FCI,n11006:FCITOFCO_DEL, 0.162,R19C9B.FCI,R19C9B.FCO,SLICE_58:ROUTE, 0.000,R19C9B.FCO,R19C9C.FCI,n11007:FCITOFCO_DEL, 0.162,R19C9C.FCI,R19C9C.FCO,SLICE_57:ROUTE, 0.000,R19C9C.FCO,R19C9D.FCI,n11008:FCITOFCO_DEL, 0.162,R19C9D.FCI,R19C9D.FCO,SLICE_56:ROUTE, 0.000,R19C9D.FCO,R19C10A.FCI,n11009:FCITOF1_DEL, 0.643,R19C10A.FCI,R19C10A.F1,SLICE_55:ROUTE, 0.000,R19C10A.F1,R19C10A.DI1,n2817">Data path</A> SLICE_2432 to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452     R21C8A.CLK to      R21C8A.Q0 <A href="#@comp:SLICE_2432">SLICE_2432</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         4     1.298<A href="#@net:o_Rx_DV:R21C8A.Q0:R21C16C.C0:1.298">      R21C8A.Q0 to R21C16C.C0    </A> <A href="#@net:o_Rx_DV">o_Rx_DV</A>
CTOF_DEL    ---     0.495     R21C16C.C0 to     R21C16C.F0 <A href="#@comp:SLICE_2476">SLICE_2476</A>
ROUTE         4     1.160<A href="#@net:n8250:R21C16C.F0:R19C17D.C0:1.160">     R21C16C.F0 to R19C17D.C0    </A> <A href="#@net:n8250">n8250</A>
CTOF_DEL    ---     0.495     R19C17D.C0 to     R19C17D.F0 <A href="#@comp:SLICE_2435">SLICE_2435</A>
ROUTE         5     0.675<A href="#@net:n12533:R19C17D.F0:R19C15B.D1:0.675">     R19C17D.F0 to R19C15B.D1    </A> <A href="#@net:n12533">n12533</A>
CTOF_DEL    ---     0.495     R19C15B.D1 to     R19C15B.F1 <A href="#@comp:SLICE_2394">SLICE_2394</A>
ROUTE        52     1.335<A href="#@net:n13057:R19C15B.F1:R19C10C.C0:1.335">     R19C15B.F1 to R19C10C.C0    </A> <A href="#@net:n13057">n13057</A>
CTOF_DEL    ---     0.495     R19C10C.C0 to     R19C10C.F0 <A href="#@comp:SLICE_2418">SLICE_2418</A>
ROUTE         1     1.675<A href="#@net:n2361:R19C10C.F0:R19C2B.C1:1.675">     R19C10C.F0 to R19C2B.C1     </A> <A href="#@net:n2361">n2361</A>
C1TOFCO_DE  ---     0.889      R19C2B.C1 to     R19C2B.FCO <A href="#@comp:SLICE_86">SLICE_86</A>
ROUTE         1     0.000<A href="#@net:n10979:R19C2B.FCO:R19C2C.FCI:0.000">     R19C2B.FCO to R19C2C.FCI    </A> <A href="#@net:n10979">n10979</A>
FCITOFCO_D  ---     0.162     R19C2C.FCI to     R19C2C.FCO <A href="#@comp:SLICE_85">SLICE_85</A>
ROUTE         1     0.000<A href="#@net:n10980:R19C2C.FCO:R19C2D.FCI:0.000">     R19C2C.FCO to R19C2D.FCI    </A> <A href="#@net:n10980">n10980</A>
FCITOFCO_D  ---     0.162     R19C2D.FCI to     R19C2D.FCO <A href="#@comp:SLICE_84">SLICE_84</A>
ROUTE         1     0.000<A href="#@net:n10981:R19C2D.FCO:R19C3A.FCI:0.000">     R19C2D.FCO to R19C3A.FCI    </A> <A href="#@net:n10981">n10981</A>
FCITOFCO_D  ---     0.162     R19C3A.FCI to     R19C3A.FCO <A href="#@comp:SLICE_83">SLICE_83</A>
ROUTE         1     0.000<A href="#@net:n10982:R19C3A.FCO:R19C3B.FCI:0.000">     R19C3A.FCO to R19C3B.FCI    </A> <A href="#@net:n10982">n10982</A>
FCITOFCO_D  ---     0.162     R19C3B.FCI to     R19C3B.FCO <A href="#@comp:SLICE_82">SLICE_82</A>
ROUTE         1     0.000<A href="#@net:n10983:R19C3B.FCO:R19C3C.FCI:0.000">     R19C3B.FCO to R19C3C.FCI    </A> <A href="#@net:n10983">n10983</A>
FCITOFCO_D  ---     0.162     R19C3C.FCI to     R19C3C.FCO <A href="#@comp:SLICE_81">SLICE_81</A>
ROUTE         1     0.000<A href="#@net:n10984:R19C3C.FCO:R19C3D.FCI:0.000">     R19C3C.FCO to R19C3D.FCI    </A> <A href="#@net:n10984">n10984</A>
FCITOFCO_D  ---     0.162     R19C3D.FCI to     R19C3D.FCO <A href="#@comp:SLICE_80">SLICE_80</A>
ROUTE         1     0.000<A href="#@net:n10985:R19C3D.FCO:R19C4A.FCI:0.000">     R19C3D.FCO to R19C4A.FCI    </A> <A href="#@net:n10985">n10985</A>
FCITOFCO_D  ---     0.162     R19C4A.FCI to     R19C4A.FCO <A href="#@comp:SLICE_79">SLICE_79</A>
ROUTE         1     0.000<A href="#@net:n10986:R19C4A.FCO:R19C4B.FCI:0.000">     R19C4A.FCO to R19C4B.FCI    </A> <A href="#@net:n10986">n10986</A>
FCITOFCO_D  ---     0.162     R19C4B.FCI to     R19C4B.FCO <A href="#@comp:SLICE_78">SLICE_78</A>
ROUTE         1     0.000<A href="#@net:n10987:R19C4B.FCO:R19C4C.FCI:0.000">     R19C4B.FCO to R19C4C.FCI    </A> <A href="#@net:n10987">n10987</A>
FCITOFCO_D  ---     0.162     R19C4C.FCI to     R19C4C.FCO <A href="#@comp:SLICE_77">SLICE_77</A>
ROUTE         1     0.000<A href="#@net:n10988:R19C4C.FCO:R19C4D.FCI:0.000">     R19C4C.FCO to R19C4D.FCI    </A> <A href="#@net:n10988">n10988</A>
FCITOFCO_D  ---     0.162     R19C4D.FCI to     R19C4D.FCO <A href="#@comp:SLICE_76">SLICE_76</A>
ROUTE         1     0.000<A href="#@net:n10989:R19C4D.FCO:R19C5A.FCI:0.000">     R19C4D.FCO to R19C5A.FCI    </A> <A href="#@net:n10989">n10989</A>
FCITOFCO_D  ---     0.162     R19C5A.FCI to     R19C5A.FCO <A href="#@comp:SLICE_75">SLICE_75</A>
ROUTE         1     0.000<A href="#@net:n10990:R19C5A.FCO:R19C5B.FCI:0.000">     R19C5A.FCO to R19C5B.FCI    </A> <A href="#@net:n10990">n10990</A>
FCITOFCO_D  ---     0.162     R19C5B.FCI to     R19C5B.FCO <A href="#@comp:SLICE_74">SLICE_74</A>
ROUTE         1     0.000<A href="#@net:n10991:R19C5B.FCO:R19C5C.FCI:0.000">     R19C5B.FCO to R19C5C.FCI    </A> <A href="#@net:n10991">n10991</A>
FCITOFCO_D  ---     0.162     R19C5C.FCI to     R19C5C.FCO <A href="#@comp:SLICE_73">SLICE_73</A>
ROUTE         1     0.000<A href="#@net:n10992:R19C5C.FCO:R19C5D.FCI:0.000">     R19C5C.FCO to R19C5D.FCI    </A> <A href="#@net:n10992">n10992</A>
FCITOFCO_D  ---     0.162     R19C5D.FCI to     R19C5D.FCO <A href="#@comp:SLICE_72">SLICE_72</A>
ROUTE         1     0.000<A href="#@net:n10993:R19C5D.FCO:R19C6A.FCI:0.000">     R19C5D.FCO to R19C6A.FCI    </A> <A href="#@net:n10993">n10993</A>
FCITOFCO_D  ---     0.162     R19C6A.FCI to     R19C6A.FCO <A href="#@comp:SLICE_71">SLICE_71</A>
ROUTE         1     0.000<A href="#@net:n10994:R19C6A.FCO:R19C6B.FCI:0.000">     R19C6A.FCO to R19C6B.FCI    </A> <A href="#@net:n10994">n10994</A>
FCITOFCO_D  ---     0.162     R19C6B.FCI to     R19C6B.FCO <A href="#@comp:SLICE_70">SLICE_70</A>
ROUTE         1     0.000<A href="#@net:n10995:R19C6B.FCO:R19C6C.FCI:0.000">     R19C6B.FCO to R19C6C.FCI    </A> <A href="#@net:n10995">n10995</A>
FCITOFCO_D  ---     0.162     R19C6C.FCI to     R19C6C.FCO <A href="#@comp:SLICE_69">SLICE_69</A>
ROUTE         1     0.000<A href="#@net:n10996:R19C6C.FCO:R19C6D.FCI:0.000">     R19C6C.FCO to R19C6D.FCI    </A> <A href="#@net:n10996">n10996</A>
FCITOFCO_D  ---     0.162     R19C6D.FCI to     R19C6D.FCO <A href="#@comp:SLICE_68">SLICE_68</A>
ROUTE         1     0.000<A href="#@net:n10997:R19C6D.FCO:R19C7A.FCI:0.000">     R19C6D.FCO to R19C7A.FCI    </A> <A href="#@net:n10997">n10997</A>
FCITOFCO_D  ---     0.162     R19C7A.FCI to     R19C7A.FCO <A href="#@comp:SLICE_67">SLICE_67</A>
ROUTE         1     0.000<A href="#@net:n10998:R19C7A.FCO:R19C7B.FCI:0.000">     R19C7A.FCO to R19C7B.FCI    </A> <A href="#@net:n10998">n10998</A>
FCITOFCO_D  ---     0.162     R19C7B.FCI to     R19C7B.FCO <A href="#@comp:SLICE_66">SLICE_66</A>
ROUTE         1     0.000<A href="#@net:n10999:R19C7B.FCO:R19C7C.FCI:0.000">     R19C7B.FCO to R19C7C.FCI    </A> <A href="#@net:n10999">n10999</A>
FCITOFCO_D  ---     0.162     R19C7C.FCI to     R19C7C.FCO <A href="#@comp:SLICE_65">SLICE_65</A>
ROUTE         1     0.000<A href="#@net:n11000:R19C7C.FCO:R19C7D.FCI:0.000">     R19C7C.FCO to R19C7D.FCI    </A> <A href="#@net:n11000">n11000</A>
FCITOFCO_D  ---     0.162     R19C7D.FCI to     R19C7D.FCO <A href="#@comp:SLICE_64">SLICE_64</A>
ROUTE         1     0.000<A href="#@net:n11001:R19C7D.FCO:R19C8A.FCI:0.000">     R19C7D.FCO to R19C8A.FCI    </A> <A href="#@net:n11001">n11001</A>
FCITOFCO_D  ---     0.162     R19C8A.FCI to     R19C8A.FCO <A href="#@comp:SLICE_63">SLICE_63</A>
ROUTE         1     0.000<A href="#@net:n11002:R19C8A.FCO:R19C8B.FCI:0.000">     R19C8A.FCO to R19C8B.FCI    </A> <A href="#@net:n11002">n11002</A>
FCITOFCO_D  ---     0.162     R19C8B.FCI to     R19C8B.FCO <A href="#@comp:SLICE_62">SLICE_62</A>
ROUTE         1     0.000<A href="#@net:n11003:R19C8B.FCO:R19C8C.FCI:0.000">     R19C8B.FCO to R19C8C.FCI    </A> <A href="#@net:n11003">n11003</A>
FCITOFCO_D  ---     0.162     R19C8C.FCI to     R19C8C.FCO <A href="#@comp:SLICE_61">SLICE_61</A>
ROUTE         1     0.000<A href="#@net:n11004:R19C8C.FCO:R19C8D.FCI:0.000">     R19C8C.FCO to R19C8D.FCI    </A> <A href="#@net:n11004">n11004</A>
FCITOFCO_D  ---     0.162     R19C8D.FCI to     R19C8D.FCO <A href="#@comp:SLICE_60">SLICE_60</A>
ROUTE         1     0.000<A href="#@net:n11005:R19C8D.FCO:R19C9A.FCI:0.000">     R19C8D.FCO to R19C9A.FCI    </A> <A href="#@net:n11005">n11005</A>
FCITOFCO_D  ---     0.162     R19C9A.FCI to     R19C9A.FCO <A href="#@comp:SLICE_59">SLICE_59</A>
ROUTE         1     0.000<A href="#@net:n11006:R19C9A.FCO:R19C9B.FCI:0.000">     R19C9A.FCO to R19C9B.FCI    </A> <A href="#@net:n11006">n11006</A>
FCITOFCO_D  ---     0.162     R19C9B.FCI to     R19C9B.FCO <A href="#@comp:SLICE_58">SLICE_58</A>
ROUTE         1     0.000<A href="#@net:n11007:R19C9B.FCO:R19C9C.FCI:0.000">     R19C9B.FCO to R19C9C.FCI    </A> <A href="#@net:n11007">n11007</A>
FCITOFCO_D  ---     0.162     R19C9C.FCI to     R19C9C.FCO <A href="#@comp:SLICE_57">SLICE_57</A>
ROUTE         1     0.000<A href="#@net:n11008:R19C9C.FCO:R19C9D.FCI:0.000">     R19C9C.FCO to R19C9D.FCI    </A> <A href="#@net:n11008">n11008</A>
FCITOFCO_D  ---     0.162     R19C9D.FCI to     R19C9D.FCO <A href="#@comp:SLICE_56">SLICE_56</A>
ROUTE         1     0.000<A href="#@net:n11009:R19C9D.FCO:R19C10A.FCI:0.000">     R19C9D.FCO to R19C10A.FCI   </A> <A href="#@net:n11009">n11009</A>
FCITOF1_DE  ---     0.643    R19C10A.FCI to     R19C10A.F1 <A href="#@comp:SLICE_55">SLICE_55</A>
ROUTE         1     0.000<A href="#@net:n2817:R19C10A.F1:R19C10A.DI1:0.000">     R19C10A.F1 to R19C10A.DI1   </A> <A href="#@net:n2817">n2817</A> (to <A href="#@net:osc_clk">osc_clk</A>)
                  --------
                   14.967   (59.0% logic, 41.0% route), 37 logic levels.

 Clock Skew Details: 

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.162,OSC.OSC,R21C8A.CLK,osc_clk">Source Clock Path</A> OSCH_inst to SLICE_2432:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.162<A href="#@net:osc_clk:OSC.OSC:R21C8A.CLK:4.162">        OSC.OSC to R21C8A.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.162   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.199,OSC.OSC,R19C10A.CLK,osc_clk">Destination Clock Path</A> OSCH_inst to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R19C10A.CLK:4.199">        OSC.OSC to R19C10A.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.
<font color=#FF0000> 

Error: The following path exceeds requirements by 3.814ns
 </font>
 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:SLICE_2432">o_Rx_DV_40</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    FF         Data in        <A href="#@comp:SLICE_55">phase_inc_carrGen_i0_i62</A>  (to <A href="#@net:osc_clk">osc_clk</A> +)

   Delay:              14.963ns  (57.3% logic, 42.7% route), 35 logic levels.

 Constraint Details:

     14.963ns physical path delay SLICE_2432 to SLICE_55 exceeds
     11.278ns delay constraint less
     -0.037ns skew and
      0.166ns DIN_SET requirement (totaling 11.149ns) by 3.814ns

 Physical Path Details:

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:REG_DEL, 0.452,R21C8A.CLK,R21C8A.Q0,SLICE_2432:ROUTE, 1.298,R21C8A.Q0,R21C16C.C0,o_Rx_DV:CTOF_DEL, 0.495,R21C16C.C0,R21C16C.F0,SLICE_2476:ROUTE, 1.160,R21C16C.F0,R19C17D.C0,n8250:CTOF_DEL, 0.495,R19C17D.C0,R19C17D.F0,SLICE_2435:ROUTE, 0.675,R19C17D.F0,R19C15B.D1,n12533:CTOF_DEL, 0.495,R19C15B.D1,R19C15B.F1,SLICE_2394:ROUTE, 1.080,R19C15B.F1,R19C16C.B0,n13057:CTOF_DEL, 0.495,R19C16C.B0,R19C16C.F0,SLICE_2414:ROUTE, 2.174,R19C16C.F0,R19C2D.C0,n2358:C0TOFCO_DEL, 1.023,R19C2D.C0,R19C2D.FCO,SLICE_84:ROUTE, 0.000,R19C2D.FCO,R19C3A.FCI,n10981:FCITOFCO_DEL, 0.162,R19C3A.FCI,R19C3A.FCO,SLICE_83:ROUTE, 0.000,R19C3A.FCO,R19C3B.FCI,n10982:FCITOFCO_DEL, 0.162,R19C3B.FCI,R19C3B.FCO,SLICE_82:ROUTE, 0.000,R19C3B.FCO,R19C3C.FCI,n10983:FCITOFCO_DEL, 0.162,R19C3C.FCI,R19C3C.FCO,SLICE_81:ROUTE, 0.000,R19C3C.FCO,R19C3D.FCI,n10984:FCITOFCO_DEL, 0.162,R19C3D.FCI,R19C3D.FCO,SLICE_80:ROUTE, 0.000,R19C3D.FCO,R19C4A.FCI,n10985:FCITOFCO_DEL, 0.162,R19C4A.FCI,R19C4A.FCO,SLICE_79:ROUTE, 0.000,R19C4A.FCO,R19C4B.FCI,n10986:FCITOFCO_DEL, 0.162,R19C4B.FCI,R19C4B.FCO,SLICE_78:ROUTE, 0.000,R19C4B.FCO,R19C4C.FCI,n10987:FCITOFCO_DEL, 0.162,R19C4C.FCI,R19C4C.FCO,SLICE_77:ROUTE, 0.000,R19C4C.FCO,R19C4D.FCI,n10988:FCITOFCO_DEL, 0.162,R19C4D.FCI,R19C4D.FCO,SLICE_76:ROUTE, 0.000,R19C4D.FCO,R19C5A.FCI,n10989:FCITOFCO_DEL, 0.162,R19C5A.FCI,R19C5A.FCO,SLICE_75:ROUTE, 0.000,R19C5A.FCO,R19C5B.FCI,n10990:FCITOFCO_DEL, 0.162,R19C5B.FCI,R19C5B.FCO,SLICE_74:ROUTE, 0.000,R19C5B.FCO,R19C5C.FCI,n10991:FCITOFCO_DEL, 0.162,R19C5C.FCI,R19C5C.FCO,SLICE_73:ROUTE, 0.000,R19C5C.FCO,R19C5D.FCI,n10992:FCITOFCO_DEL, 0.162,R19C5D.FCI,R19C5D.FCO,SLICE_72:ROUTE, 0.000,R19C5D.FCO,R19C6A.FCI,n10993:FCITOFCO_DEL, 0.162,R19C6A.FCI,R19C6A.FCO,SLICE_71:ROUTE, 0.000,R19C6A.FCO,R19C6B.FCI,n10994:FCITOFCO_DEL, 0.162,R19C6B.FCI,R19C6B.FCO,SLICE_70:ROUTE, 0.000,R19C6B.FCO,R19C6C.FCI,n10995:FCITOFCO_DEL, 0.162,R19C6C.FCI,R19C6C.FCO,SLICE_69:ROUTE, 0.000,R19C6C.FCO,R19C6D.FCI,n10996:FCITOFCO_DEL, 0.162,R19C6D.FCI,R19C6D.FCO,SLICE_68:ROUTE, 0.000,R19C6D.FCO,R19C7A.FCI,n10997:FCITOFCO_DEL, 0.162,R19C7A.FCI,R19C7A.FCO,SLICE_67:ROUTE, 0.000,R19C7A.FCO,R19C7B.FCI,n10998:FCITOFCO_DEL, 0.162,R19C7B.FCI,R19C7B.FCO,SLICE_66:ROUTE, 0.000,R19C7B.FCO,R19C7C.FCI,n10999:FCITOFCO_DEL, 0.162,R19C7C.FCI,R19C7C.FCO,SLICE_65:ROUTE, 0.000,R19C7C.FCO,R19C7D.FCI,n11000:FCITOFCO_DEL, 0.162,R19C7D.FCI,R19C7D.FCO,SLICE_64:ROUTE, 0.000,R19C7D.FCO,R19C8A.FCI,n11001:FCITOFCO_DEL, 0.162,R19C8A.FCI,R19C8A.FCO,SLICE_63:ROUTE, 0.000,R19C8A.FCO,R19C8B.FCI,n11002:FCITOFCO_DEL, 0.162,R19C8B.FCI,R19C8B.FCO,SLICE_62:ROUTE, 0.000,R19C8B.FCO,R19C8C.FCI,n11003:FCITOFCO_DEL, 0.162,R19C8C.FCI,R19C8C.FCO,SLICE_61:ROUTE, 0.000,R19C8C.FCO,R19C8D.FCI,n11004:FCITOFCO_DEL, 0.162,R19C8D.FCI,R19C8D.FCO,SLICE_60:ROUTE, 0.000,R19C8D.FCO,R19C9A.FCI,n11005:FCITOFCO_DEL, 0.162,R19C9A.FCI,R19C9A.FCO,SLICE_59:ROUTE, 0.000,R19C9A.FCO,R19C9B.FCI,n11006:FCITOFCO_DEL, 0.162,R19C9B.FCI,R19C9B.FCO,SLICE_58:ROUTE, 0.000,R19C9B.FCO,R19C9C.FCI,n11007:FCITOFCO_DEL, 0.162,R19C9C.FCI,R19C9C.FCO,SLICE_57:ROUTE, 0.000,R19C9C.FCO,R19C9D.FCI,n11008:FCITOFCO_DEL, 0.162,R19C9D.FCI,R19C9D.FCO,SLICE_56:ROUTE, 0.000,R19C9D.FCO,R19C10A.FCI,n11009:FCITOF0_DEL, 0.585,R19C10A.FCI,R19C10A.F0,SLICE_55:ROUTE, 0.000,R19C10A.F0,R19C10A.DI0,n2818">Data path</A> SLICE_2432 to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452     R21C8A.CLK to      R21C8A.Q0 <A href="#@comp:SLICE_2432">SLICE_2432</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         4     1.298<A href="#@net:o_Rx_DV:R21C8A.Q0:R21C16C.C0:1.298">      R21C8A.Q0 to R21C16C.C0    </A> <A href="#@net:o_Rx_DV">o_Rx_DV</A>
CTOF_DEL    ---     0.495     R21C16C.C0 to     R21C16C.F0 <A href="#@comp:SLICE_2476">SLICE_2476</A>
ROUTE         4     1.160<A href="#@net:n8250:R21C16C.F0:R19C17D.C0:1.160">     R21C16C.F0 to R19C17D.C0    </A> <A href="#@net:n8250">n8250</A>
CTOF_DEL    ---     0.495     R19C17D.C0 to     R19C17D.F0 <A href="#@comp:SLICE_2435">SLICE_2435</A>
ROUTE         5     0.675<A href="#@net:n12533:R19C17D.F0:R19C15B.D1:0.675">     R19C17D.F0 to R19C15B.D1    </A> <A href="#@net:n12533">n12533</A>
CTOF_DEL    ---     0.495     R19C15B.D1 to     R19C15B.F1 <A href="#@comp:SLICE_2394">SLICE_2394</A>
ROUTE        52     1.080<A href="#@net:n13057:R19C15B.F1:R19C16C.B0:1.080">     R19C15B.F1 to R19C16C.B0    </A> <A href="#@net:n13057">n13057</A>
CTOF_DEL    ---     0.495     R19C16C.B0 to     R19C16C.F0 <A href="#@comp:SLICE_2414">SLICE_2414</A>
ROUTE         1     2.174<A href="#@net:n2358:R19C16C.F0:R19C2D.C0:2.174">     R19C16C.F0 to R19C2D.C0     </A> <A href="#@net:n2358">n2358</A>
C0TOFCO_DE  ---     1.023      R19C2D.C0 to     R19C2D.FCO <A href="#@comp:SLICE_84">SLICE_84</A>
ROUTE         1     0.000<A href="#@net:n10981:R19C2D.FCO:R19C3A.FCI:0.000">     R19C2D.FCO to R19C3A.FCI    </A> <A href="#@net:n10981">n10981</A>
FCITOFCO_D  ---     0.162     R19C3A.FCI to     R19C3A.FCO <A href="#@comp:SLICE_83">SLICE_83</A>
ROUTE         1     0.000<A href="#@net:n10982:R19C3A.FCO:R19C3B.FCI:0.000">     R19C3A.FCO to R19C3B.FCI    </A> <A href="#@net:n10982">n10982</A>
FCITOFCO_D  ---     0.162     R19C3B.FCI to     R19C3B.FCO <A href="#@comp:SLICE_82">SLICE_82</A>
ROUTE         1     0.000<A href="#@net:n10983:R19C3B.FCO:R19C3C.FCI:0.000">     R19C3B.FCO to R19C3C.FCI    </A> <A href="#@net:n10983">n10983</A>
FCITOFCO_D  ---     0.162     R19C3C.FCI to     R19C3C.FCO <A href="#@comp:SLICE_81">SLICE_81</A>
ROUTE         1     0.000<A href="#@net:n10984:R19C3C.FCO:R19C3D.FCI:0.000">     R19C3C.FCO to R19C3D.FCI    </A> <A href="#@net:n10984">n10984</A>
FCITOFCO_D  ---     0.162     R19C3D.FCI to     R19C3D.FCO <A href="#@comp:SLICE_80">SLICE_80</A>
ROUTE         1     0.000<A href="#@net:n10985:R19C3D.FCO:R19C4A.FCI:0.000">     R19C3D.FCO to R19C4A.FCI    </A> <A href="#@net:n10985">n10985</A>
FCITOFCO_D  ---     0.162     R19C4A.FCI to     R19C4A.FCO <A href="#@comp:SLICE_79">SLICE_79</A>
ROUTE         1     0.000<A href="#@net:n10986:R19C4A.FCO:R19C4B.FCI:0.000">     R19C4A.FCO to R19C4B.FCI    </A> <A href="#@net:n10986">n10986</A>
FCITOFCO_D  ---     0.162     R19C4B.FCI to     R19C4B.FCO <A href="#@comp:SLICE_78">SLICE_78</A>
ROUTE         1     0.000<A href="#@net:n10987:R19C4B.FCO:R19C4C.FCI:0.000">     R19C4B.FCO to R19C4C.FCI    </A> <A href="#@net:n10987">n10987</A>
FCITOFCO_D  ---     0.162     R19C4C.FCI to     R19C4C.FCO <A href="#@comp:SLICE_77">SLICE_77</A>
ROUTE         1     0.000<A href="#@net:n10988:R19C4C.FCO:R19C4D.FCI:0.000">     R19C4C.FCO to R19C4D.FCI    </A> <A href="#@net:n10988">n10988</A>
FCITOFCO_D  ---     0.162     R19C4D.FCI to     R19C4D.FCO <A href="#@comp:SLICE_76">SLICE_76</A>
ROUTE         1     0.000<A href="#@net:n10989:R19C4D.FCO:R19C5A.FCI:0.000">     R19C4D.FCO to R19C5A.FCI    </A> <A href="#@net:n10989">n10989</A>
FCITOFCO_D  ---     0.162     R19C5A.FCI to     R19C5A.FCO <A href="#@comp:SLICE_75">SLICE_75</A>
ROUTE         1     0.000<A href="#@net:n10990:R19C5A.FCO:R19C5B.FCI:0.000">     R19C5A.FCO to R19C5B.FCI    </A> <A href="#@net:n10990">n10990</A>
FCITOFCO_D  ---     0.162     R19C5B.FCI to     R19C5B.FCO <A href="#@comp:SLICE_74">SLICE_74</A>
ROUTE         1     0.000<A href="#@net:n10991:R19C5B.FCO:R19C5C.FCI:0.000">     R19C5B.FCO to R19C5C.FCI    </A> <A href="#@net:n10991">n10991</A>
FCITOFCO_D  ---     0.162     R19C5C.FCI to     R19C5C.FCO <A href="#@comp:SLICE_73">SLICE_73</A>
ROUTE         1     0.000<A href="#@net:n10992:R19C5C.FCO:R19C5D.FCI:0.000">     R19C5C.FCO to R19C5D.FCI    </A> <A href="#@net:n10992">n10992</A>
FCITOFCO_D  ---     0.162     R19C5D.FCI to     R19C5D.FCO <A href="#@comp:SLICE_72">SLICE_72</A>
ROUTE         1     0.000<A href="#@net:n10993:R19C5D.FCO:R19C6A.FCI:0.000">     R19C5D.FCO to R19C6A.FCI    </A> <A href="#@net:n10993">n10993</A>
FCITOFCO_D  ---     0.162     R19C6A.FCI to     R19C6A.FCO <A href="#@comp:SLICE_71">SLICE_71</A>
ROUTE         1     0.000<A href="#@net:n10994:R19C6A.FCO:R19C6B.FCI:0.000">     R19C6A.FCO to R19C6B.FCI    </A> <A href="#@net:n10994">n10994</A>
FCITOFCO_D  ---     0.162     R19C6B.FCI to     R19C6B.FCO <A href="#@comp:SLICE_70">SLICE_70</A>
ROUTE         1     0.000<A href="#@net:n10995:R19C6B.FCO:R19C6C.FCI:0.000">     R19C6B.FCO to R19C6C.FCI    </A> <A href="#@net:n10995">n10995</A>
FCITOFCO_D  ---     0.162     R19C6C.FCI to     R19C6C.FCO <A href="#@comp:SLICE_69">SLICE_69</A>
ROUTE         1     0.000<A href="#@net:n10996:R19C6C.FCO:R19C6D.FCI:0.000">     R19C6C.FCO to R19C6D.FCI    </A> <A href="#@net:n10996">n10996</A>
FCITOFCO_D  ---     0.162     R19C6D.FCI to     R19C6D.FCO <A href="#@comp:SLICE_68">SLICE_68</A>
ROUTE         1     0.000<A href="#@net:n10997:R19C6D.FCO:R19C7A.FCI:0.000">     R19C6D.FCO to R19C7A.FCI    </A> <A href="#@net:n10997">n10997</A>
FCITOFCO_D  ---     0.162     R19C7A.FCI to     R19C7A.FCO <A href="#@comp:SLICE_67">SLICE_67</A>
ROUTE         1     0.000<A href="#@net:n10998:R19C7A.FCO:R19C7B.FCI:0.000">     R19C7A.FCO to R19C7B.FCI    </A> <A href="#@net:n10998">n10998</A>
FCITOFCO_D  ---     0.162     R19C7B.FCI to     R19C7B.FCO <A href="#@comp:SLICE_66">SLICE_66</A>
ROUTE         1     0.000<A href="#@net:n10999:R19C7B.FCO:R19C7C.FCI:0.000">     R19C7B.FCO to R19C7C.FCI    </A> <A href="#@net:n10999">n10999</A>
FCITOFCO_D  ---     0.162     R19C7C.FCI to     R19C7C.FCO <A href="#@comp:SLICE_65">SLICE_65</A>
ROUTE         1     0.000<A href="#@net:n11000:R19C7C.FCO:R19C7D.FCI:0.000">     R19C7C.FCO to R19C7D.FCI    </A> <A href="#@net:n11000">n11000</A>
FCITOFCO_D  ---     0.162     R19C7D.FCI to     R19C7D.FCO <A href="#@comp:SLICE_64">SLICE_64</A>
ROUTE         1     0.000<A href="#@net:n11001:R19C7D.FCO:R19C8A.FCI:0.000">     R19C7D.FCO to R19C8A.FCI    </A> <A href="#@net:n11001">n11001</A>
FCITOFCO_D  ---     0.162     R19C8A.FCI to     R19C8A.FCO <A href="#@comp:SLICE_63">SLICE_63</A>
ROUTE         1     0.000<A href="#@net:n11002:R19C8A.FCO:R19C8B.FCI:0.000">     R19C8A.FCO to R19C8B.FCI    </A> <A href="#@net:n11002">n11002</A>
FCITOFCO_D  ---     0.162     R19C8B.FCI to     R19C8B.FCO <A href="#@comp:SLICE_62">SLICE_62</A>
ROUTE         1     0.000<A href="#@net:n11003:R19C8B.FCO:R19C8C.FCI:0.000">     R19C8B.FCO to R19C8C.FCI    </A> <A href="#@net:n11003">n11003</A>
FCITOFCO_D  ---     0.162     R19C8C.FCI to     R19C8C.FCO <A href="#@comp:SLICE_61">SLICE_61</A>
ROUTE         1     0.000<A href="#@net:n11004:R19C8C.FCO:R19C8D.FCI:0.000">     R19C8C.FCO to R19C8D.FCI    </A> <A href="#@net:n11004">n11004</A>
FCITOFCO_D  ---     0.162     R19C8D.FCI to     R19C8D.FCO <A href="#@comp:SLICE_60">SLICE_60</A>
ROUTE         1     0.000<A href="#@net:n11005:R19C8D.FCO:R19C9A.FCI:0.000">     R19C8D.FCO to R19C9A.FCI    </A> <A href="#@net:n11005">n11005</A>
FCITOFCO_D  ---     0.162     R19C9A.FCI to     R19C9A.FCO <A href="#@comp:SLICE_59">SLICE_59</A>
ROUTE         1     0.000<A href="#@net:n11006:R19C9A.FCO:R19C9B.FCI:0.000">     R19C9A.FCO to R19C9B.FCI    </A> <A href="#@net:n11006">n11006</A>
FCITOFCO_D  ---     0.162     R19C9B.FCI to     R19C9B.FCO <A href="#@comp:SLICE_58">SLICE_58</A>
ROUTE         1     0.000<A href="#@net:n11007:R19C9B.FCO:R19C9C.FCI:0.000">     R19C9B.FCO to R19C9C.FCI    </A> <A href="#@net:n11007">n11007</A>
FCITOFCO_D  ---     0.162     R19C9C.FCI to     R19C9C.FCO <A href="#@comp:SLICE_57">SLICE_57</A>
ROUTE         1     0.000<A href="#@net:n11008:R19C9C.FCO:R19C9D.FCI:0.000">     R19C9C.FCO to R19C9D.FCI    </A> <A href="#@net:n11008">n11008</A>
FCITOFCO_D  ---     0.162     R19C9D.FCI to     R19C9D.FCO <A href="#@comp:SLICE_56">SLICE_56</A>
ROUTE         1     0.000<A href="#@net:n11009:R19C9D.FCO:R19C10A.FCI:0.000">     R19C9D.FCO to R19C10A.FCI   </A> <A href="#@net:n11009">n11009</A>
FCITOF0_DE  ---     0.585    R19C10A.FCI to     R19C10A.F0 <A href="#@comp:SLICE_55">SLICE_55</A>
ROUTE         1     0.000<A href="#@net:n2818:R19C10A.F0:R19C10A.DI0:0.000">     R19C10A.F0 to R19C10A.DI0   </A> <A href="#@net:n2818">n2818</A> (to <A href="#@net:osc_clk">osc_clk</A>)
                  --------
                   14.963   (57.3% logic, 42.7% route), 35 logic levels.

 Clock Skew Details: 

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.162,OSC.OSC,R21C8A.CLK,osc_clk">Source Clock Path</A> OSCH_inst to SLICE_2432:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.162<A href="#@net:osc_clk:OSC.OSC:R21C8A.CLK:4.162">        OSC.OSC to R21C8A.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.162   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.199,OSC.OSC,R19C10A.CLK,osc_clk">Destination Clock Path</A> OSCH_inst to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R19C10A.CLK:4.199">        OSC.OSC to R19C10A.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.
<font color=#FF0000> 

Error: The following path exceeds requirements by 3.766ns
 </font>
 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:SLICE_84">phase_inc_carrGen_i0_i5</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    FF         Data in        <A href="#@comp:SLICE_55">phase_inc_carrGen_i0_i63</A>  (to <A href="#@net:osc_clk">osc_clk</A> +)

   Delay:              14.879ns  (60.4% logic, 39.6% route), 33 logic levels.

 Constraint Details:

     14.879ns physical path delay SLICE_84 to SLICE_55 exceeds
     11.278ns delay constraint less
     -0.001ns skew and
      0.166ns DIN_SET requirement (totaling 11.113ns) by 3.766ns

 Physical Path Details:

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:REG_DEL, 0.452,R19C2D.CLK,R19C2D.Q1,SLICE_84:ROUTE, 1.426,R19C2D.Q1,R18C4B.A0,phase_inc_carrGen_5:C0TOFCO_DEL, 1.023,R18C4B.A0,R18C4B.FCO,SLICE_131:ROUTE, 0.000,R18C4B.FCO,R18C4C.FCI,n10808:FCITOFCO_DEL, 0.162,R18C4C.FCI,R18C4C.FCO,SLICE_130:ROUTE, 0.000,R18C4C.FCO,R18C4D.FCI,n10809:FCITOFCO_DEL, 0.162,R18C4D.FCI,R18C4D.FCO,SLICE_129:ROUTE, 0.000,R18C4D.FCO,R18C5A.FCI,n10810:FCITOFCO_DEL, 0.162,R18C5A.FCI,R18C5A.FCO,SLICE_128:ROUTE, 0.000,R18C5A.FCO,R18C5B.FCI,n10811:FCITOFCO_DEL, 0.162,R18C5B.FCI,R18C5B.FCO,SLICE_127:ROUTE, 0.000,R18C5B.FCO,R18C5C.FCI,n10812:FCITOFCO_DEL, 0.162,R18C5C.FCI,R18C5C.FCO,SLICE_126:ROUTE, 0.000,R18C5C.FCO,R18C5D.FCI,n10813:FCITOFCO_DEL, 0.162,R18C5D.FCI,R18C5D.FCO,SLICE_125:ROUTE, 0.000,R18C5D.FCO,R18C6A.FCI,n10814:FCITOFCO_DEL, 0.162,R18C6A.FCI,R18C6A.FCO,SLICE_124:ROUTE, 0.000,R18C6A.FCO,R18C6B.FCI,n10815:FCITOFCO_DEL, 0.162,R18C6B.FCI,R18C6B.FCO,SLICE_123:ROUTE, 0.000,R18C6B.FCO,R18C6C.FCI,n10816:FCITOFCO_DEL, 0.162,R18C6C.FCI,R18C6C.FCO,SLICE_122:ROUTE, 0.000,R18C6C.FCO,R18C6D.FCI,n10817:FCITOFCO_DEL, 0.162,R18C6D.FCI,R18C6D.FCO,SLICE_121:ROUTE, 0.000,R18C6D.FCO,R18C7A.FCI,n10818:FCITOFCO_DEL, 0.162,R18C7A.FCI,R18C7A.FCO,SLICE_120:ROUTE, 0.000,R18C7A.FCO,R18C7B.FCI,n10819:FCITOFCO_DEL, 0.162,R18C7B.FCI,R18C7B.FCO,SLICE_119:ROUTE, 0.000,R18C7B.FCO,R18C7C.FCI,n10820:FCITOFCO_DEL, 0.162,R18C7C.FCI,R18C7C.FCO,SLICE_118:ROUTE, 0.000,R18C7C.FCO,R18C7D.FCI,n10821:FCITOFCO_DEL, 0.162,R18C7D.FCI,R18C7D.FCO,SLICE_117:ROUTE, 0.000,R18C7D.FCO,R18C8A.FCI,n10822:FCITOFCO_DEL, 0.162,R18C8A.FCI,R18C8A.FCO,SLICE_116:ROUTE, 0.000,R18C8A.FCO,R18C8B.FCI,n10823:FCITOF1_DEL, 0.643,R18C8B.FCI,R18C8B.F1,SLICE_115:ROUTE, 1.278,R18C8B.F1,R18C15A.C0,n1056:CTOF_DEL, 0.495,R18C15A.C0,R18C15A.F0,SLICE_2482:ROUTE, 1.001,R18C15A.F0,R19C15B.B0,n7813:CTOF_DEL, 0.495,R19C15B.B0,R19C15B.F0,SLICE_2394:ROUTE, 2.188,R19C15B.F0,R19C7A.C0,n2324:C0TOFCO_DEL, 1.023,R19C7A.C0,R19C7A.FCO,SLICE_67:ROUTE, 0.000,R19C7A.FCO,R19C7B.FCI,n10998:FCITOFCO_DEL, 0.162,R19C7B.FCI,R19C7B.FCO,SLICE_66:ROUTE, 0.000,R19C7B.FCO,R19C7C.FCI,n10999:FCITOFCO_DEL, 0.162,R19C7C.FCI,R19C7C.FCO,SLICE_65:ROUTE, 0.000,R19C7C.FCO,R19C7D.FCI,n11000:FCITOFCO_DEL, 0.162,R19C7D.FCI,R19C7D.FCO,SLICE_64:ROUTE, 0.000,R19C7D.FCO,R19C8A.FCI,n11001:FCITOFCO_DEL, 0.162,R19C8A.FCI,R19C8A.FCO,SLICE_63:ROUTE, 0.000,R19C8A.FCO,R19C8B.FCI,n11002:FCITOFCO_DEL, 0.162,R19C8B.FCI,R19C8B.FCO,SLICE_62:ROUTE, 0.000,R19C8B.FCO,R19C8C.FCI,n11003:FCITOFCO_DEL, 0.162,R19C8C.FCI,R19C8C.FCO,SLICE_61:ROUTE, 0.000,R19C8C.FCO,R19C8D.FCI,n11004:FCITOFCO_DEL, 0.162,R19C8D.FCI,R19C8D.FCO,SLICE_60:ROUTE, 0.000,R19C8D.FCO,R19C9A.FCI,n11005:FCITOFCO_DEL, 0.162,R19C9A.FCI,R19C9A.FCO,SLICE_59:ROUTE, 0.000,R19C9A.FCO,R19C9B.FCI,n11006:FCITOFCO_DEL, 0.162,R19C9B.FCI,R19C9B.FCO,SLICE_58:ROUTE, 0.000,R19C9B.FCO,R19C9C.FCI,n11007:FCITOFCO_DEL, 0.162,R19C9C.FCI,R19C9C.FCO,SLICE_57:ROUTE, 0.000,R19C9C.FCO,R19C9D.FCI,n11008:FCITOFCO_DEL, 0.162,R19C9D.FCI,R19C9D.FCO,SLICE_56:ROUTE, 0.000,R19C9D.FCO,R19C10A.FCI,n11009:FCITOF1_DEL, 0.643,R19C10A.FCI,R19C10A.F1,SLICE_55:ROUTE, 0.000,R19C10A.F1,R19C10A.DI1,n2817">Data path</A> SLICE_84 to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452     R19C2D.CLK to      R19C2D.Q1 <A href="#@comp:SLICE_84">SLICE_84</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         4     1.426<A href="#@net:phase_inc_carrGen_5:R19C2D.Q1:R18C4B.A0:1.426">      R19C2D.Q1 to R18C4B.A0     </A> <A href="#@net:phase_inc_carrGen_5">phase_inc_carrGen_5</A>
C0TOFCO_DE  ---     1.023      R18C4B.A0 to     R18C4B.FCO <A href="#@comp:SLICE_131">SLICE_131</A>
ROUTE         1     0.000<A href="#@net:n10808:R18C4B.FCO:R18C4C.FCI:0.000">     R18C4B.FCO to R18C4C.FCI    </A> <A href="#@net:n10808">n10808</A>
FCITOFCO_D  ---     0.162     R18C4C.FCI to     R18C4C.FCO <A href="#@comp:SLICE_130">SLICE_130</A>
ROUTE         1     0.000<A href="#@net:n10809:R18C4C.FCO:R18C4D.FCI:0.000">     R18C4C.FCO to R18C4D.FCI    </A> <A href="#@net:n10809">n10809</A>
FCITOFCO_D  ---     0.162     R18C4D.FCI to     R18C4D.FCO <A href="#@comp:SLICE_129">SLICE_129</A>
ROUTE         1     0.000<A href="#@net:n10810:R18C4D.FCO:R18C5A.FCI:0.000">     R18C4D.FCO to R18C5A.FCI    </A> <A href="#@net:n10810">n10810</A>
FCITOFCO_D  ---     0.162     R18C5A.FCI to     R18C5A.FCO <A href="#@comp:SLICE_128">SLICE_128</A>
ROUTE         1     0.000<A href="#@net:n10811:R18C5A.FCO:R18C5B.FCI:0.000">     R18C5A.FCO to R18C5B.FCI    </A> <A href="#@net:n10811">n10811</A>
FCITOFCO_D  ---     0.162     R18C5B.FCI to     R18C5B.FCO <A href="#@comp:SLICE_127">SLICE_127</A>
ROUTE         1     0.000<A href="#@net:n10812:R18C5B.FCO:R18C5C.FCI:0.000">     R18C5B.FCO to R18C5C.FCI    </A> <A href="#@net:n10812">n10812</A>
FCITOFCO_D  ---     0.162     R18C5C.FCI to     R18C5C.FCO <A href="#@comp:SLICE_126">SLICE_126</A>
ROUTE         1     0.000<A href="#@net:n10813:R18C5C.FCO:R18C5D.FCI:0.000">     R18C5C.FCO to R18C5D.FCI    </A> <A href="#@net:n10813">n10813</A>
FCITOFCO_D  ---     0.162     R18C5D.FCI to     R18C5D.FCO <A href="#@comp:SLICE_125">SLICE_125</A>
ROUTE         1     0.000<A href="#@net:n10814:R18C5D.FCO:R18C6A.FCI:0.000">     R18C5D.FCO to R18C6A.FCI    </A> <A href="#@net:n10814">n10814</A>
FCITOFCO_D  ---     0.162     R18C6A.FCI to     R18C6A.FCO <A href="#@comp:SLICE_124">SLICE_124</A>
ROUTE         1     0.000<A href="#@net:n10815:R18C6A.FCO:R18C6B.FCI:0.000">     R18C6A.FCO to R18C6B.FCI    </A> <A href="#@net:n10815">n10815</A>
FCITOFCO_D  ---     0.162     R18C6B.FCI to     R18C6B.FCO <A href="#@comp:SLICE_123">SLICE_123</A>
ROUTE         1     0.000<A href="#@net:n10816:R18C6B.FCO:R18C6C.FCI:0.000">     R18C6B.FCO to R18C6C.FCI    </A> <A href="#@net:n10816">n10816</A>
FCITOFCO_D  ---     0.162     R18C6C.FCI to     R18C6C.FCO <A href="#@comp:SLICE_122">SLICE_122</A>
ROUTE         1     0.000<A href="#@net:n10817:R18C6C.FCO:R18C6D.FCI:0.000">     R18C6C.FCO to R18C6D.FCI    </A> <A href="#@net:n10817">n10817</A>
FCITOFCO_D  ---     0.162     R18C6D.FCI to     R18C6D.FCO <A href="#@comp:SLICE_121">SLICE_121</A>
ROUTE         1     0.000<A href="#@net:n10818:R18C6D.FCO:R18C7A.FCI:0.000">     R18C6D.FCO to R18C7A.FCI    </A> <A href="#@net:n10818">n10818</A>
FCITOFCO_D  ---     0.162     R18C7A.FCI to     R18C7A.FCO <A href="#@comp:SLICE_120">SLICE_120</A>
ROUTE         1     0.000<A href="#@net:n10819:R18C7A.FCO:R18C7B.FCI:0.000">     R18C7A.FCO to R18C7B.FCI    </A> <A href="#@net:n10819">n10819</A>
FCITOFCO_D  ---     0.162     R18C7B.FCI to     R18C7B.FCO <A href="#@comp:SLICE_119">SLICE_119</A>
ROUTE         1     0.000<A href="#@net:n10820:R18C7B.FCO:R18C7C.FCI:0.000">     R18C7B.FCO to R18C7C.FCI    </A> <A href="#@net:n10820">n10820</A>
FCITOFCO_D  ---     0.162     R18C7C.FCI to     R18C7C.FCO <A href="#@comp:SLICE_118">SLICE_118</A>
ROUTE         1     0.000<A href="#@net:n10821:R18C7C.FCO:R18C7D.FCI:0.000">     R18C7C.FCO to R18C7D.FCI    </A> <A href="#@net:n10821">n10821</A>
FCITOFCO_D  ---     0.162     R18C7D.FCI to     R18C7D.FCO <A href="#@comp:SLICE_117">SLICE_117</A>
ROUTE         1     0.000<A href="#@net:n10822:R18C7D.FCO:R18C8A.FCI:0.000">     R18C7D.FCO to R18C8A.FCI    </A> <A href="#@net:n10822">n10822</A>
FCITOFCO_D  ---     0.162     R18C8A.FCI to     R18C8A.FCO <A href="#@comp:SLICE_116">SLICE_116</A>
ROUTE         1     0.000<A href="#@net:n10823:R18C8A.FCO:R18C8B.FCI:0.000">     R18C8A.FCO to R18C8B.FCI    </A> <A href="#@net:n10823">n10823</A>
FCITOF1_DE  ---     0.643     R18C8B.FCI to      R18C8B.F1 <A href="#@comp:SLICE_115">SLICE_115</A>
ROUTE         1     1.278<A href="#@net:n1056:R18C8B.F1:R18C15A.C0:1.278">      R18C8B.F1 to R18C15A.C0    </A> <A href="#@net:n1056">n1056</A>
CTOF_DEL    ---     0.495     R18C15A.C0 to     R18C15A.F0 <A href="#@comp:SLICE_2482">SLICE_2482</A>
ROUTE         1     1.001<A href="#@net:n7813:R18C15A.F0:R19C15B.B0:1.001">     R18C15A.F0 to R19C15B.B0    </A> <A href="#@net:n7813">n7813</A>
CTOF_DEL    ---     0.495     R19C15B.B0 to     R19C15B.F0 <A href="#@comp:SLICE_2394">SLICE_2394</A>
ROUTE         1     2.188<A href="#@net:n2324:R19C15B.F0:R19C7A.C0:2.188">     R19C15B.F0 to R19C7A.C0     </A> <A href="#@net:n2324">n2324</A>
C0TOFCO_DE  ---     1.023      R19C7A.C0 to     R19C7A.FCO <A href="#@comp:SLICE_67">SLICE_67</A>
ROUTE         1     0.000<A href="#@net:n10998:R19C7A.FCO:R19C7B.FCI:0.000">     R19C7A.FCO to R19C7B.FCI    </A> <A href="#@net:n10998">n10998</A>
FCITOFCO_D  ---     0.162     R19C7B.FCI to     R19C7B.FCO <A href="#@comp:SLICE_66">SLICE_66</A>
ROUTE         1     0.000<A href="#@net:n10999:R19C7B.FCO:R19C7C.FCI:0.000">     R19C7B.FCO to R19C7C.FCI    </A> <A href="#@net:n10999">n10999</A>
FCITOFCO_D  ---     0.162     R19C7C.FCI to     R19C7C.FCO <A href="#@comp:SLICE_65">SLICE_65</A>
ROUTE         1     0.000<A href="#@net:n11000:R19C7C.FCO:R19C7D.FCI:0.000">     R19C7C.FCO to R19C7D.FCI    </A> <A href="#@net:n11000">n11000</A>
FCITOFCO_D  ---     0.162     R19C7D.FCI to     R19C7D.FCO <A href="#@comp:SLICE_64">SLICE_64</A>
ROUTE         1     0.000<A href="#@net:n11001:R19C7D.FCO:R19C8A.FCI:0.000">     R19C7D.FCO to R19C8A.FCI    </A> <A href="#@net:n11001">n11001</A>
FCITOFCO_D  ---     0.162     R19C8A.FCI to     R19C8A.FCO <A href="#@comp:SLICE_63">SLICE_63</A>
ROUTE         1     0.000<A href="#@net:n11002:R19C8A.FCO:R19C8B.FCI:0.000">     R19C8A.FCO to R19C8B.FCI    </A> <A href="#@net:n11002">n11002</A>
FCITOFCO_D  ---     0.162     R19C8B.FCI to     R19C8B.FCO <A href="#@comp:SLICE_62">SLICE_62</A>
ROUTE         1     0.000<A href="#@net:n11003:R19C8B.FCO:R19C8C.FCI:0.000">     R19C8B.FCO to R19C8C.FCI    </A> <A href="#@net:n11003">n11003</A>
FCITOFCO_D  ---     0.162     R19C8C.FCI to     R19C8C.FCO <A href="#@comp:SLICE_61">SLICE_61</A>
ROUTE         1     0.000<A href="#@net:n11004:R19C8C.FCO:R19C8D.FCI:0.000">     R19C8C.FCO to R19C8D.FCI    </A> <A href="#@net:n11004">n11004</A>
FCITOFCO_D  ---     0.162     R19C8D.FCI to     R19C8D.FCO <A href="#@comp:SLICE_60">SLICE_60</A>
ROUTE         1     0.000<A href="#@net:n11005:R19C8D.FCO:R19C9A.FCI:0.000">     R19C8D.FCO to R19C9A.FCI    </A> <A href="#@net:n11005">n11005</A>
FCITOFCO_D  ---     0.162     R19C9A.FCI to     R19C9A.FCO <A href="#@comp:SLICE_59">SLICE_59</A>
ROUTE         1     0.000<A href="#@net:n11006:R19C9A.FCO:R19C9B.FCI:0.000">     R19C9A.FCO to R19C9B.FCI    </A> <A href="#@net:n11006">n11006</A>
FCITOFCO_D  ---     0.162     R19C9B.FCI to     R19C9B.FCO <A href="#@comp:SLICE_58">SLICE_58</A>
ROUTE         1     0.000<A href="#@net:n11007:R19C9B.FCO:R19C9C.FCI:0.000">     R19C9B.FCO to R19C9C.FCI    </A> <A href="#@net:n11007">n11007</A>
FCITOFCO_D  ---     0.162     R19C9C.FCI to     R19C9C.FCO <A href="#@comp:SLICE_57">SLICE_57</A>
ROUTE         1     0.000<A href="#@net:n11008:R19C9C.FCO:R19C9D.FCI:0.000">     R19C9C.FCO to R19C9D.FCI    </A> <A href="#@net:n11008">n11008</A>
FCITOFCO_D  ---     0.162     R19C9D.FCI to     R19C9D.FCO <A href="#@comp:SLICE_56">SLICE_56</A>
ROUTE         1     0.000<A href="#@net:n11009:R19C9D.FCO:R19C10A.FCI:0.000">     R19C9D.FCO to R19C10A.FCI   </A> <A href="#@net:n11009">n11009</A>
FCITOF1_DE  ---     0.643    R19C10A.FCI to     R19C10A.F1 <A href="#@comp:SLICE_55">SLICE_55</A>
ROUTE         1     0.000<A href="#@net:n2817:R19C10A.F1:R19C10A.DI1:0.000">     R19C10A.F1 to R19C10A.DI1   </A> <A href="#@net:n2817">n2817</A> (to <A href="#@net:osc_clk">osc_clk</A>)
                  --------
                   14.879   (60.4% logic, 39.6% route), 33 logic levels.

 Clock Skew Details: 

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.198,OSC.OSC,R19C2D.CLK,osc_clk">Source Clock Path</A> OSCH_inst to SLICE_84:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.198<A href="#@net:osc_clk:OSC.OSC:R19C2D.CLK:4.198">        OSC.OSC to R19C2D.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.198   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.199,OSC.OSC,R19C10A.CLK,osc_clk">Destination Clock Path</A> OSCH_inst to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R19C10A.CLK:4.199">        OSC.OSC to R19C10A.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.
<font color=#FF0000> 

Error: The following path exceeds requirements by 3.760ns
 </font>
 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:SLICE_2432">o_Rx_DV_40</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    FF         Data in        <A href="#@comp:SLICE_55">phase_inc_carrGen_i0_i62</A>  (to <A href="#@net:osc_clk">osc_clk</A> +)

   Delay:              14.909ns  (58.8% logic, 41.2% route), 37 logic levels.

 Constraint Details:

     14.909ns physical path delay SLICE_2432 to SLICE_55 exceeds
     11.278ns delay constraint less
     -0.037ns skew and
      0.166ns DIN_SET requirement (totaling 11.149ns) by 3.760ns

 Physical Path Details:

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:REG_DEL, 0.452,R21C8A.CLK,R21C8A.Q0,SLICE_2432:ROUTE, 1.298,R21C8A.Q0,R21C16C.C0,o_Rx_DV:CTOF_DEL, 0.495,R21C16C.C0,R21C16C.F0,SLICE_2476:ROUTE, 1.160,R21C16C.F0,R19C17D.C0,n8250:CTOF_DEL, 0.495,R19C17D.C0,R19C17D.F0,SLICE_2435:ROUTE, 0.675,R19C17D.F0,R19C15B.D1,n12533:CTOF_DEL, 0.495,R19C15B.D1,R19C15B.F1,SLICE_2394:ROUTE, 1.335,R19C15B.F1,R19C10C.C0,n13057:CTOF_DEL, 0.495,R19C10C.C0,R19C10C.F0,SLICE_2418:ROUTE, 1.675,R19C10C.F0,R19C2B.C1,n2361:C1TOFCO_DEL, 0.889,R19C2B.C1,R19C2B.FCO,SLICE_86:ROUTE, 0.000,R19C2B.FCO,R19C2C.FCI,n10979:FCITOFCO_DEL, 0.162,R19C2C.FCI,R19C2C.FCO,SLICE_85:ROUTE, 0.000,R19C2C.FCO,R19C2D.FCI,n10980:FCITOFCO_DEL, 0.162,R19C2D.FCI,R19C2D.FCO,SLICE_84:ROUTE, 0.000,R19C2D.FCO,R19C3A.FCI,n10981:FCITOFCO_DEL, 0.162,R19C3A.FCI,R19C3A.FCO,SLICE_83:ROUTE, 0.000,R19C3A.FCO,R19C3B.FCI,n10982:FCITOFCO_DEL, 0.162,R19C3B.FCI,R19C3B.FCO,SLICE_82:ROUTE, 0.000,R19C3B.FCO,R19C3C.FCI,n10983:FCITOFCO_DEL, 0.162,R19C3C.FCI,R19C3C.FCO,SLICE_81:ROUTE, 0.000,R19C3C.FCO,R19C3D.FCI,n10984:FCITOFCO_DEL, 0.162,R19C3D.FCI,R19C3D.FCO,SLICE_80:ROUTE, 0.000,R19C3D.FCO,R19C4A.FCI,n10985:FCITOFCO_DEL, 0.162,R19C4A.FCI,R19C4A.FCO,SLICE_79:ROUTE, 0.000,R19C4A.FCO,R19C4B.FCI,n10986:FCITOFCO_DEL, 0.162,R19C4B.FCI,R19C4B.FCO,SLICE_78:ROUTE, 0.000,R19C4B.FCO,R19C4C.FCI,n10987:FCITOFCO_DEL, 0.162,R19C4C.FCI,R19C4C.FCO,SLICE_77:ROUTE, 0.000,R19C4C.FCO,R19C4D.FCI,n10988:FCITOFCO_DEL, 0.162,R19C4D.FCI,R19C4D.FCO,SLICE_76:ROUTE, 0.000,R19C4D.FCO,R19C5A.FCI,n10989:FCITOFCO_DEL, 0.162,R19C5A.FCI,R19C5A.FCO,SLICE_75:ROUTE, 0.000,R19C5A.FCO,R19C5B.FCI,n10990:FCITOFCO_DEL, 0.162,R19C5B.FCI,R19C5B.FCO,SLICE_74:ROUTE, 0.000,R19C5B.FCO,R19C5C.FCI,n10991:FCITOFCO_DEL, 0.162,R19C5C.FCI,R19C5C.FCO,SLICE_73:ROUTE, 0.000,R19C5C.FCO,R19C5D.FCI,n10992:FCITOFCO_DEL, 0.162,R19C5D.FCI,R19C5D.FCO,SLICE_72:ROUTE, 0.000,R19C5D.FCO,R19C6A.FCI,n10993:FCITOFCO_DEL, 0.162,R19C6A.FCI,R19C6A.FCO,SLICE_71:ROUTE, 0.000,R19C6A.FCO,R19C6B.FCI,n10994:FCITOFCO_DEL, 0.162,R19C6B.FCI,R19C6B.FCO,SLICE_70:ROUTE, 0.000,R19C6B.FCO,R19C6C.FCI,n10995:FCITOFCO_DEL, 0.162,R19C6C.FCI,R19C6C.FCO,SLICE_69:ROUTE, 0.000,R19C6C.FCO,R19C6D.FCI,n10996:FCITOFCO_DEL, 0.162,R19C6D.FCI,R19C6D.FCO,SLICE_68:ROUTE, 0.000,R19C6D.FCO,R19C7A.FCI,n10997:FCITOFCO_DEL, 0.162,R19C7A.FCI,R19C7A.FCO,SLICE_67:ROUTE, 0.000,R19C7A.FCO,R19C7B.FCI,n10998:FCITOFCO_DEL, 0.162,R19C7B.FCI,R19C7B.FCO,SLICE_66:ROUTE, 0.000,R19C7B.FCO,R19C7C.FCI,n10999:FCITOFCO_DEL, 0.162,R19C7C.FCI,R19C7C.FCO,SLICE_65:ROUTE, 0.000,R19C7C.FCO,R19C7D.FCI,n11000:FCITOFCO_DEL, 0.162,R19C7D.FCI,R19C7D.FCO,SLICE_64:ROUTE, 0.000,R19C7D.FCO,R19C8A.FCI,n11001:FCITOFCO_DEL, 0.162,R19C8A.FCI,R19C8A.FCO,SLICE_63:ROUTE, 0.000,R19C8A.FCO,R19C8B.FCI,n11002:FCITOFCO_DEL, 0.162,R19C8B.FCI,R19C8B.FCO,SLICE_62:ROUTE, 0.000,R19C8B.FCO,R19C8C.FCI,n11003:FCITOFCO_DEL, 0.162,R19C8C.FCI,R19C8C.FCO,SLICE_61:ROUTE, 0.000,R19C8C.FCO,R19C8D.FCI,n11004:FCITOFCO_DEL, 0.162,R19C8D.FCI,R19C8D.FCO,SLICE_60:ROUTE, 0.000,R19C8D.FCO,R19C9A.FCI,n11005:FCITOFCO_DEL, 0.162,R19C9A.FCI,R19C9A.FCO,SLICE_59:ROUTE, 0.000,R19C9A.FCO,R19C9B.FCI,n11006:FCITOFCO_DEL, 0.162,R19C9B.FCI,R19C9B.FCO,SLICE_58:ROUTE, 0.000,R19C9B.FCO,R19C9C.FCI,n11007:FCITOFCO_DEL, 0.162,R19C9C.FCI,R19C9C.FCO,SLICE_57:ROUTE, 0.000,R19C9C.FCO,R19C9D.FCI,n11008:FCITOFCO_DEL, 0.162,R19C9D.FCI,R19C9D.FCO,SLICE_56:ROUTE, 0.000,R19C9D.FCO,R19C10A.FCI,n11009:FCITOF0_DEL, 0.585,R19C10A.FCI,R19C10A.F0,SLICE_55:ROUTE, 0.000,R19C10A.F0,R19C10A.DI0,n2818">Data path</A> SLICE_2432 to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452     R21C8A.CLK to      R21C8A.Q0 <A href="#@comp:SLICE_2432">SLICE_2432</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         4     1.298<A href="#@net:o_Rx_DV:R21C8A.Q0:R21C16C.C0:1.298">      R21C8A.Q0 to R21C16C.C0    </A> <A href="#@net:o_Rx_DV">o_Rx_DV</A>
CTOF_DEL    ---     0.495     R21C16C.C0 to     R21C16C.F0 <A href="#@comp:SLICE_2476">SLICE_2476</A>
ROUTE         4     1.160<A href="#@net:n8250:R21C16C.F0:R19C17D.C0:1.160">     R21C16C.F0 to R19C17D.C0    </A> <A href="#@net:n8250">n8250</A>
CTOF_DEL    ---     0.495     R19C17D.C0 to     R19C17D.F0 <A href="#@comp:SLICE_2435">SLICE_2435</A>
ROUTE         5     0.675<A href="#@net:n12533:R19C17D.F0:R19C15B.D1:0.675">     R19C17D.F0 to R19C15B.D1    </A> <A href="#@net:n12533">n12533</A>
CTOF_DEL    ---     0.495     R19C15B.D1 to     R19C15B.F1 <A href="#@comp:SLICE_2394">SLICE_2394</A>
ROUTE        52     1.335<A href="#@net:n13057:R19C15B.F1:R19C10C.C0:1.335">     R19C15B.F1 to R19C10C.C0    </A> <A href="#@net:n13057">n13057</A>
CTOF_DEL    ---     0.495     R19C10C.C0 to     R19C10C.F0 <A href="#@comp:SLICE_2418">SLICE_2418</A>
ROUTE         1     1.675<A href="#@net:n2361:R19C10C.F0:R19C2B.C1:1.675">     R19C10C.F0 to R19C2B.C1     </A> <A href="#@net:n2361">n2361</A>
C1TOFCO_DE  ---     0.889      R19C2B.C1 to     R19C2B.FCO <A href="#@comp:SLICE_86">SLICE_86</A>
ROUTE         1     0.000<A href="#@net:n10979:R19C2B.FCO:R19C2C.FCI:0.000">     R19C2B.FCO to R19C2C.FCI    </A> <A href="#@net:n10979">n10979</A>
FCITOFCO_D  ---     0.162     R19C2C.FCI to     R19C2C.FCO <A href="#@comp:SLICE_85">SLICE_85</A>
ROUTE         1     0.000<A href="#@net:n10980:R19C2C.FCO:R19C2D.FCI:0.000">     R19C2C.FCO to R19C2D.FCI    </A> <A href="#@net:n10980">n10980</A>
FCITOFCO_D  ---     0.162     R19C2D.FCI to     R19C2D.FCO <A href="#@comp:SLICE_84">SLICE_84</A>
ROUTE         1     0.000<A href="#@net:n10981:R19C2D.FCO:R19C3A.FCI:0.000">     R19C2D.FCO to R19C3A.FCI    </A> <A href="#@net:n10981">n10981</A>
FCITOFCO_D  ---     0.162     R19C3A.FCI to     R19C3A.FCO <A href="#@comp:SLICE_83">SLICE_83</A>
ROUTE         1     0.000<A href="#@net:n10982:R19C3A.FCO:R19C3B.FCI:0.000">     R19C3A.FCO to R19C3B.FCI    </A> <A href="#@net:n10982">n10982</A>
FCITOFCO_D  ---     0.162     R19C3B.FCI to     R19C3B.FCO <A href="#@comp:SLICE_82">SLICE_82</A>
ROUTE         1     0.000<A href="#@net:n10983:R19C3B.FCO:R19C3C.FCI:0.000">     R19C3B.FCO to R19C3C.FCI    </A> <A href="#@net:n10983">n10983</A>
FCITOFCO_D  ---     0.162     R19C3C.FCI to     R19C3C.FCO <A href="#@comp:SLICE_81">SLICE_81</A>
ROUTE         1     0.000<A href="#@net:n10984:R19C3C.FCO:R19C3D.FCI:0.000">     R19C3C.FCO to R19C3D.FCI    </A> <A href="#@net:n10984">n10984</A>
FCITOFCO_D  ---     0.162     R19C3D.FCI to     R19C3D.FCO <A href="#@comp:SLICE_80">SLICE_80</A>
ROUTE         1     0.000<A href="#@net:n10985:R19C3D.FCO:R19C4A.FCI:0.000">     R19C3D.FCO to R19C4A.FCI    </A> <A href="#@net:n10985">n10985</A>
FCITOFCO_D  ---     0.162     R19C4A.FCI to     R19C4A.FCO <A href="#@comp:SLICE_79">SLICE_79</A>
ROUTE         1     0.000<A href="#@net:n10986:R19C4A.FCO:R19C4B.FCI:0.000">     R19C4A.FCO to R19C4B.FCI    </A> <A href="#@net:n10986">n10986</A>
FCITOFCO_D  ---     0.162     R19C4B.FCI to     R19C4B.FCO <A href="#@comp:SLICE_78">SLICE_78</A>
ROUTE         1     0.000<A href="#@net:n10987:R19C4B.FCO:R19C4C.FCI:0.000">     R19C4B.FCO to R19C4C.FCI    </A> <A href="#@net:n10987">n10987</A>
FCITOFCO_D  ---     0.162     R19C4C.FCI to     R19C4C.FCO <A href="#@comp:SLICE_77">SLICE_77</A>
ROUTE         1     0.000<A href="#@net:n10988:R19C4C.FCO:R19C4D.FCI:0.000">     R19C4C.FCO to R19C4D.FCI    </A> <A href="#@net:n10988">n10988</A>
FCITOFCO_D  ---     0.162     R19C4D.FCI to     R19C4D.FCO <A href="#@comp:SLICE_76">SLICE_76</A>
ROUTE         1     0.000<A href="#@net:n10989:R19C4D.FCO:R19C5A.FCI:0.000">     R19C4D.FCO to R19C5A.FCI    </A> <A href="#@net:n10989">n10989</A>
FCITOFCO_D  ---     0.162     R19C5A.FCI to     R19C5A.FCO <A href="#@comp:SLICE_75">SLICE_75</A>
ROUTE         1     0.000<A href="#@net:n10990:R19C5A.FCO:R19C5B.FCI:0.000">     R19C5A.FCO to R19C5B.FCI    </A> <A href="#@net:n10990">n10990</A>
FCITOFCO_D  ---     0.162     R19C5B.FCI to     R19C5B.FCO <A href="#@comp:SLICE_74">SLICE_74</A>
ROUTE         1     0.000<A href="#@net:n10991:R19C5B.FCO:R19C5C.FCI:0.000">     R19C5B.FCO to R19C5C.FCI    </A> <A href="#@net:n10991">n10991</A>
FCITOFCO_D  ---     0.162     R19C5C.FCI to     R19C5C.FCO <A href="#@comp:SLICE_73">SLICE_73</A>
ROUTE         1     0.000<A href="#@net:n10992:R19C5C.FCO:R19C5D.FCI:0.000">     R19C5C.FCO to R19C5D.FCI    </A> <A href="#@net:n10992">n10992</A>
FCITOFCO_D  ---     0.162     R19C5D.FCI to     R19C5D.FCO <A href="#@comp:SLICE_72">SLICE_72</A>
ROUTE         1     0.000<A href="#@net:n10993:R19C5D.FCO:R19C6A.FCI:0.000">     R19C5D.FCO to R19C6A.FCI    </A> <A href="#@net:n10993">n10993</A>
FCITOFCO_D  ---     0.162     R19C6A.FCI to     R19C6A.FCO <A href="#@comp:SLICE_71">SLICE_71</A>
ROUTE         1     0.000<A href="#@net:n10994:R19C6A.FCO:R19C6B.FCI:0.000">     R19C6A.FCO to R19C6B.FCI    </A> <A href="#@net:n10994">n10994</A>
FCITOFCO_D  ---     0.162     R19C6B.FCI to     R19C6B.FCO <A href="#@comp:SLICE_70">SLICE_70</A>
ROUTE         1     0.000<A href="#@net:n10995:R19C6B.FCO:R19C6C.FCI:0.000">     R19C6B.FCO to R19C6C.FCI    </A> <A href="#@net:n10995">n10995</A>
FCITOFCO_D  ---     0.162     R19C6C.FCI to     R19C6C.FCO <A href="#@comp:SLICE_69">SLICE_69</A>
ROUTE         1     0.000<A href="#@net:n10996:R19C6C.FCO:R19C6D.FCI:0.000">     R19C6C.FCO to R19C6D.FCI    </A> <A href="#@net:n10996">n10996</A>
FCITOFCO_D  ---     0.162     R19C6D.FCI to     R19C6D.FCO <A href="#@comp:SLICE_68">SLICE_68</A>
ROUTE         1     0.000<A href="#@net:n10997:R19C6D.FCO:R19C7A.FCI:0.000">     R19C6D.FCO to R19C7A.FCI    </A> <A href="#@net:n10997">n10997</A>
FCITOFCO_D  ---     0.162     R19C7A.FCI to     R19C7A.FCO <A href="#@comp:SLICE_67">SLICE_67</A>
ROUTE         1     0.000<A href="#@net:n10998:R19C7A.FCO:R19C7B.FCI:0.000">     R19C7A.FCO to R19C7B.FCI    </A> <A href="#@net:n10998">n10998</A>
FCITOFCO_D  ---     0.162     R19C7B.FCI to     R19C7B.FCO <A href="#@comp:SLICE_66">SLICE_66</A>
ROUTE         1     0.000<A href="#@net:n10999:R19C7B.FCO:R19C7C.FCI:0.000">     R19C7B.FCO to R19C7C.FCI    </A> <A href="#@net:n10999">n10999</A>
FCITOFCO_D  ---     0.162     R19C7C.FCI to     R19C7C.FCO <A href="#@comp:SLICE_65">SLICE_65</A>
ROUTE         1     0.000<A href="#@net:n11000:R19C7C.FCO:R19C7D.FCI:0.000">     R19C7C.FCO to R19C7D.FCI    </A> <A href="#@net:n11000">n11000</A>
FCITOFCO_D  ---     0.162     R19C7D.FCI to     R19C7D.FCO <A href="#@comp:SLICE_64">SLICE_64</A>
ROUTE         1     0.000<A href="#@net:n11001:R19C7D.FCO:R19C8A.FCI:0.000">     R19C7D.FCO to R19C8A.FCI    </A> <A href="#@net:n11001">n11001</A>
FCITOFCO_D  ---     0.162     R19C8A.FCI to     R19C8A.FCO <A href="#@comp:SLICE_63">SLICE_63</A>
ROUTE         1     0.000<A href="#@net:n11002:R19C8A.FCO:R19C8B.FCI:0.000">     R19C8A.FCO to R19C8B.FCI    </A> <A href="#@net:n11002">n11002</A>
FCITOFCO_D  ---     0.162     R19C8B.FCI to     R19C8B.FCO <A href="#@comp:SLICE_62">SLICE_62</A>
ROUTE         1     0.000<A href="#@net:n11003:R19C8B.FCO:R19C8C.FCI:0.000">     R19C8B.FCO to R19C8C.FCI    </A> <A href="#@net:n11003">n11003</A>
FCITOFCO_D  ---     0.162     R19C8C.FCI to     R19C8C.FCO <A href="#@comp:SLICE_61">SLICE_61</A>
ROUTE         1     0.000<A href="#@net:n11004:R19C8C.FCO:R19C8D.FCI:0.000">     R19C8C.FCO to R19C8D.FCI    </A> <A href="#@net:n11004">n11004</A>
FCITOFCO_D  ---     0.162     R19C8D.FCI to     R19C8D.FCO <A href="#@comp:SLICE_60">SLICE_60</A>
ROUTE         1     0.000<A href="#@net:n11005:R19C8D.FCO:R19C9A.FCI:0.000">     R19C8D.FCO to R19C9A.FCI    </A> <A href="#@net:n11005">n11005</A>
FCITOFCO_D  ---     0.162     R19C9A.FCI to     R19C9A.FCO <A href="#@comp:SLICE_59">SLICE_59</A>
ROUTE         1     0.000<A href="#@net:n11006:R19C9A.FCO:R19C9B.FCI:0.000">     R19C9A.FCO to R19C9B.FCI    </A> <A href="#@net:n11006">n11006</A>
FCITOFCO_D  ---     0.162     R19C9B.FCI to     R19C9B.FCO <A href="#@comp:SLICE_58">SLICE_58</A>
ROUTE         1     0.000<A href="#@net:n11007:R19C9B.FCO:R19C9C.FCI:0.000">     R19C9B.FCO to R19C9C.FCI    </A> <A href="#@net:n11007">n11007</A>
FCITOFCO_D  ---     0.162     R19C9C.FCI to     R19C9C.FCO <A href="#@comp:SLICE_57">SLICE_57</A>
ROUTE         1     0.000<A href="#@net:n11008:R19C9C.FCO:R19C9D.FCI:0.000">     R19C9C.FCO to R19C9D.FCI    </A> <A href="#@net:n11008">n11008</A>
FCITOFCO_D  ---     0.162     R19C9D.FCI to     R19C9D.FCO <A href="#@comp:SLICE_56">SLICE_56</A>
ROUTE         1     0.000<A href="#@net:n11009:R19C9D.FCO:R19C10A.FCI:0.000">     R19C9D.FCO to R19C10A.FCI   </A> <A href="#@net:n11009">n11009</A>
FCITOF0_DE  ---     0.585    R19C10A.FCI to     R19C10A.F0 <A href="#@comp:SLICE_55">SLICE_55</A>
ROUTE         1     0.000<A href="#@net:n2818:R19C10A.F0:R19C10A.DI0:0.000">     R19C10A.F0 to R19C10A.DI0   </A> <A href="#@net:n2818">n2818</A> (to <A href="#@net:osc_clk">osc_clk</A>)
                  --------
                   14.909   (58.8% logic, 41.2% route), 37 logic levels.

 Clock Skew Details: 

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.162,OSC.OSC,R21C8A.CLK,osc_clk">Source Clock Path</A> OSCH_inst to SLICE_2432:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.162<A href="#@net:osc_clk:OSC.OSC:R21C8A.CLK:4.162">        OSC.OSC to R21C8A.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.162   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.199,OSC.OSC,R19C10A.CLK,osc_clk">Destination Clock Path</A> OSCH_inst to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R19C10A.CLK:4.199">        OSC.OSC to R19C10A.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.
<font color=#FF0000> 

Error: The following path exceeds requirements by 3.747ns
 </font>
 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:SLICE_2432">o_Rx_DV_40</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    FF         Data in        <A href="#@comp:SLICE_55">phase_inc_carrGen_i0_i63</A>  (to <A href="#@net:osc_clk">osc_clk</A> +)

   Delay:              14.896ns  (59.2% logic, 40.8% route), 37 logic levels.

 Constraint Details:

     14.896ns physical path delay SLICE_2432 to SLICE_55 exceeds
     11.278ns delay constraint less
     -0.037ns skew and
      0.166ns DIN_SET requirement (totaling 11.149ns) by 3.747ns

 Physical Path Details:

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:REG_DEL, 0.452,R21C8A.CLK,R21C8A.Q0,SLICE_2432:ROUTE, 1.298,R21C8A.Q0,R21C16C.C0,o_Rx_DV:CTOF_DEL, 0.495,R21C16C.C0,R21C16C.F0,SLICE_2476:ROUTE, 1.160,R21C16C.F0,R19C17D.C0,n8250:CTOF_DEL, 0.495,R19C17D.C0,R19C17D.F0,SLICE_2435:ROUTE, 0.675,R19C17D.F0,R19C15D.D1,n12533:CTOF_DEL, 0.495,R19C15D.D1,R19C15D.F1,SLICE_2389:ROUTE, 1.264,R19C15D.F1,R19C10C.D0,n2563:CTOF_DEL, 0.495,R19C10C.D0,R19C10C.F0,SLICE_2418:ROUTE, 1.675,R19C10C.F0,R19C2B.C1,n2361:C1TOFCO_DEL, 0.889,R19C2B.C1,R19C2B.FCO,SLICE_86:ROUTE, 0.000,R19C2B.FCO,R19C2C.FCI,n10979:FCITOFCO_DEL, 0.162,R19C2C.FCI,R19C2C.FCO,SLICE_85:ROUTE, 0.000,R19C2C.FCO,R19C2D.FCI,n10980:FCITOFCO_DEL, 0.162,R19C2D.FCI,R19C2D.FCO,SLICE_84:ROUTE, 0.000,R19C2D.FCO,R19C3A.FCI,n10981:FCITOFCO_DEL, 0.162,R19C3A.FCI,R19C3A.FCO,SLICE_83:ROUTE, 0.000,R19C3A.FCO,R19C3B.FCI,n10982:FCITOFCO_DEL, 0.162,R19C3B.FCI,R19C3B.FCO,SLICE_82:ROUTE, 0.000,R19C3B.FCO,R19C3C.FCI,n10983:FCITOFCO_DEL, 0.162,R19C3C.FCI,R19C3C.FCO,SLICE_81:ROUTE, 0.000,R19C3C.FCO,R19C3D.FCI,n10984:FCITOFCO_DEL, 0.162,R19C3D.FCI,R19C3D.FCO,SLICE_80:ROUTE, 0.000,R19C3D.FCO,R19C4A.FCI,n10985:FCITOFCO_DEL, 0.162,R19C4A.FCI,R19C4A.FCO,SLICE_79:ROUTE, 0.000,R19C4A.FCO,R19C4B.FCI,n10986:FCITOFCO_DEL, 0.162,R19C4B.FCI,R19C4B.FCO,SLICE_78:ROUTE, 0.000,R19C4B.FCO,R19C4C.FCI,n10987:FCITOFCO_DEL, 0.162,R19C4C.FCI,R19C4C.FCO,SLICE_77:ROUTE, 0.000,R19C4C.FCO,R19C4D.FCI,n10988:FCITOFCO_DEL, 0.162,R19C4D.FCI,R19C4D.FCO,SLICE_76:ROUTE, 0.000,R19C4D.FCO,R19C5A.FCI,n10989:FCITOFCO_DEL, 0.162,R19C5A.FCI,R19C5A.FCO,SLICE_75:ROUTE, 0.000,R19C5A.FCO,R19C5B.FCI,n10990:FCITOFCO_DEL, 0.162,R19C5B.FCI,R19C5B.FCO,SLICE_74:ROUTE, 0.000,R19C5B.FCO,R19C5C.FCI,n10991:FCITOFCO_DEL, 0.162,R19C5C.FCI,R19C5C.FCO,SLICE_73:ROUTE, 0.000,R19C5C.FCO,R19C5D.FCI,n10992:FCITOFCO_DEL, 0.162,R19C5D.FCI,R19C5D.FCO,SLICE_72:ROUTE, 0.000,R19C5D.FCO,R19C6A.FCI,n10993:FCITOFCO_DEL, 0.162,R19C6A.FCI,R19C6A.FCO,SLICE_71:ROUTE, 0.000,R19C6A.FCO,R19C6B.FCI,n10994:FCITOFCO_DEL, 0.162,R19C6B.FCI,R19C6B.FCO,SLICE_70:ROUTE, 0.000,R19C6B.FCO,R19C6C.FCI,n10995:FCITOFCO_DEL, 0.162,R19C6C.FCI,R19C6C.FCO,SLICE_69:ROUTE, 0.000,R19C6C.FCO,R19C6D.FCI,n10996:FCITOFCO_DEL, 0.162,R19C6D.FCI,R19C6D.FCO,SLICE_68:ROUTE, 0.000,R19C6D.FCO,R19C7A.FCI,n10997:FCITOFCO_DEL, 0.162,R19C7A.FCI,R19C7A.FCO,SLICE_67:ROUTE, 0.000,R19C7A.FCO,R19C7B.FCI,n10998:FCITOFCO_DEL, 0.162,R19C7B.FCI,R19C7B.FCO,SLICE_66:ROUTE, 0.000,R19C7B.FCO,R19C7C.FCI,n10999:FCITOFCO_DEL, 0.162,R19C7C.FCI,R19C7C.FCO,SLICE_65:ROUTE, 0.000,R19C7C.FCO,R19C7D.FCI,n11000:FCITOFCO_DEL, 0.162,R19C7D.FCI,R19C7D.FCO,SLICE_64:ROUTE, 0.000,R19C7D.FCO,R19C8A.FCI,n11001:FCITOFCO_DEL, 0.162,R19C8A.FCI,R19C8A.FCO,SLICE_63:ROUTE, 0.000,R19C8A.FCO,R19C8B.FCI,n11002:FCITOFCO_DEL, 0.162,R19C8B.FCI,R19C8B.FCO,SLICE_62:ROUTE, 0.000,R19C8B.FCO,R19C8C.FCI,n11003:FCITOFCO_DEL, 0.162,R19C8C.FCI,R19C8C.FCO,SLICE_61:ROUTE, 0.000,R19C8C.FCO,R19C8D.FCI,n11004:FCITOFCO_DEL, 0.162,R19C8D.FCI,R19C8D.FCO,SLICE_60:ROUTE, 0.000,R19C8D.FCO,R19C9A.FCI,n11005:FCITOFCO_DEL, 0.162,R19C9A.FCI,R19C9A.FCO,SLICE_59:ROUTE, 0.000,R19C9A.FCO,R19C9B.FCI,n11006:FCITOFCO_DEL, 0.162,R19C9B.FCI,R19C9B.FCO,SLICE_58:ROUTE, 0.000,R19C9B.FCO,R19C9C.FCI,n11007:FCITOFCO_DEL, 0.162,R19C9C.FCI,R19C9C.FCO,SLICE_57:ROUTE, 0.000,R19C9C.FCO,R19C9D.FCI,n11008:FCITOFCO_DEL, 0.162,R19C9D.FCI,R19C9D.FCO,SLICE_56:ROUTE, 0.000,R19C9D.FCO,R19C10A.FCI,n11009:FCITOF1_DEL, 0.643,R19C10A.FCI,R19C10A.F1,SLICE_55:ROUTE, 0.000,R19C10A.F1,R19C10A.DI1,n2817">Data path</A> SLICE_2432 to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452     R21C8A.CLK to      R21C8A.Q0 <A href="#@comp:SLICE_2432">SLICE_2432</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         4     1.298<A href="#@net:o_Rx_DV:R21C8A.Q0:R21C16C.C0:1.298">      R21C8A.Q0 to R21C16C.C0    </A> <A href="#@net:o_Rx_DV">o_Rx_DV</A>
CTOF_DEL    ---     0.495     R21C16C.C0 to     R21C16C.F0 <A href="#@comp:SLICE_2476">SLICE_2476</A>
ROUTE         4     1.160<A href="#@net:n8250:R21C16C.F0:R19C17D.C0:1.160">     R21C16C.F0 to R19C17D.C0    </A> <A href="#@net:n8250">n8250</A>
CTOF_DEL    ---     0.495     R19C17D.C0 to     R19C17D.F0 <A href="#@comp:SLICE_2435">SLICE_2435</A>
ROUTE         5     0.675<A href="#@net:n12533:R19C17D.F0:R19C15D.D1:0.675">     R19C17D.F0 to R19C15D.D1    </A> <A href="#@net:n12533">n12533</A>
CTOF_DEL    ---     0.495     R19C15D.D1 to     R19C15D.F1 <A href="#@comp:SLICE_2389">SLICE_2389</A>
ROUTE        49     1.264<A href="#@net:n2563:R19C15D.F1:R19C10C.D0:1.264">     R19C15D.F1 to R19C10C.D0    </A> <A href="#@net:n2563">n2563</A>
CTOF_DEL    ---     0.495     R19C10C.D0 to     R19C10C.F0 <A href="#@comp:SLICE_2418">SLICE_2418</A>
ROUTE         1     1.675<A href="#@net:n2361:R19C10C.F0:R19C2B.C1:1.675">     R19C10C.F0 to R19C2B.C1     </A> <A href="#@net:n2361">n2361</A>
C1TOFCO_DE  ---     0.889      R19C2B.C1 to     R19C2B.FCO <A href="#@comp:SLICE_86">SLICE_86</A>
ROUTE         1     0.000<A href="#@net:n10979:R19C2B.FCO:R19C2C.FCI:0.000">     R19C2B.FCO to R19C2C.FCI    </A> <A href="#@net:n10979">n10979</A>
FCITOFCO_D  ---     0.162     R19C2C.FCI to     R19C2C.FCO <A href="#@comp:SLICE_85">SLICE_85</A>
ROUTE         1     0.000<A href="#@net:n10980:R19C2C.FCO:R19C2D.FCI:0.000">     R19C2C.FCO to R19C2D.FCI    </A> <A href="#@net:n10980">n10980</A>
FCITOFCO_D  ---     0.162     R19C2D.FCI to     R19C2D.FCO <A href="#@comp:SLICE_84">SLICE_84</A>
ROUTE         1     0.000<A href="#@net:n10981:R19C2D.FCO:R19C3A.FCI:0.000">     R19C2D.FCO to R19C3A.FCI    </A> <A href="#@net:n10981">n10981</A>
FCITOFCO_D  ---     0.162     R19C3A.FCI to     R19C3A.FCO <A href="#@comp:SLICE_83">SLICE_83</A>
ROUTE         1     0.000<A href="#@net:n10982:R19C3A.FCO:R19C3B.FCI:0.000">     R19C3A.FCO to R19C3B.FCI    </A> <A href="#@net:n10982">n10982</A>
FCITOFCO_D  ---     0.162     R19C3B.FCI to     R19C3B.FCO <A href="#@comp:SLICE_82">SLICE_82</A>
ROUTE         1     0.000<A href="#@net:n10983:R19C3B.FCO:R19C3C.FCI:0.000">     R19C3B.FCO to R19C3C.FCI    </A> <A href="#@net:n10983">n10983</A>
FCITOFCO_D  ---     0.162     R19C3C.FCI to     R19C3C.FCO <A href="#@comp:SLICE_81">SLICE_81</A>
ROUTE         1     0.000<A href="#@net:n10984:R19C3C.FCO:R19C3D.FCI:0.000">     R19C3C.FCO to R19C3D.FCI    </A> <A href="#@net:n10984">n10984</A>
FCITOFCO_D  ---     0.162     R19C3D.FCI to     R19C3D.FCO <A href="#@comp:SLICE_80">SLICE_80</A>
ROUTE         1     0.000<A href="#@net:n10985:R19C3D.FCO:R19C4A.FCI:0.000">     R19C3D.FCO to R19C4A.FCI    </A> <A href="#@net:n10985">n10985</A>
FCITOFCO_D  ---     0.162     R19C4A.FCI to     R19C4A.FCO <A href="#@comp:SLICE_79">SLICE_79</A>
ROUTE         1     0.000<A href="#@net:n10986:R19C4A.FCO:R19C4B.FCI:0.000">     R19C4A.FCO to R19C4B.FCI    </A> <A href="#@net:n10986">n10986</A>
FCITOFCO_D  ---     0.162     R19C4B.FCI to     R19C4B.FCO <A href="#@comp:SLICE_78">SLICE_78</A>
ROUTE         1     0.000<A href="#@net:n10987:R19C4B.FCO:R19C4C.FCI:0.000">     R19C4B.FCO to R19C4C.FCI    </A> <A href="#@net:n10987">n10987</A>
FCITOFCO_D  ---     0.162     R19C4C.FCI to     R19C4C.FCO <A href="#@comp:SLICE_77">SLICE_77</A>
ROUTE         1     0.000<A href="#@net:n10988:R19C4C.FCO:R19C4D.FCI:0.000">     R19C4C.FCO to R19C4D.FCI    </A> <A href="#@net:n10988">n10988</A>
FCITOFCO_D  ---     0.162     R19C4D.FCI to     R19C4D.FCO <A href="#@comp:SLICE_76">SLICE_76</A>
ROUTE         1     0.000<A href="#@net:n10989:R19C4D.FCO:R19C5A.FCI:0.000">     R19C4D.FCO to R19C5A.FCI    </A> <A href="#@net:n10989">n10989</A>
FCITOFCO_D  ---     0.162     R19C5A.FCI to     R19C5A.FCO <A href="#@comp:SLICE_75">SLICE_75</A>
ROUTE         1     0.000<A href="#@net:n10990:R19C5A.FCO:R19C5B.FCI:0.000">     R19C5A.FCO to R19C5B.FCI    </A> <A href="#@net:n10990">n10990</A>
FCITOFCO_D  ---     0.162     R19C5B.FCI to     R19C5B.FCO <A href="#@comp:SLICE_74">SLICE_74</A>
ROUTE         1     0.000<A href="#@net:n10991:R19C5B.FCO:R19C5C.FCI:0.000">     R19C5B.FCO to R19C5C.FCI    </A> <A href="#@net:n10991">n10991</A>
FCITOFCO_D  ---     0.162     R19C5C.FCI to     R19C5C.FCO <A href="#@comp:SLICE_73">SLICE_73</A>
ROUTE         1     0.000<A href="#@net:n10992:R19C5C.FCO:R19C5D.FCI:0.000">     R19C5C.FCO to R19C5D.FCI    </A> <A href="#@net:n10992">n10992</A>
FCITOFCO_D  ---     0.162     R19C5D.FCI to     R19C5D.FCO <A href="#@comp:SLICE_72">SLICE_72</A>
ROUTE         1     0.000<A href="#@net:n10993:R19C5D.FCO:R19C6A.FCI:0.000">     R19C5D.FCO to R19C6A.FCI    </A> <A href="#@net:n10993">n10993</A>
FCITOFCO_D  ---     0.162     R19C6A.FCI to     R19C6A.FCO <A href="#@comp:SLICE_71">SLICE_71</A>
ROUTE         1     0.000<A href="#@net:n10994:R19C6A.FCO:R19C6B.FCI:0.000">     R19C6A.FCO to R19C6B.FCI    </A> <A href="#@net:n10994">n10994</A>
FCITOFCO_D  ---     0.162     R19C6B.FCI to     R19C6B.FCO <A href="#@comp:SLICE_70">SLICE_70</A>
ROUTE         1     0.000<A href="#@net:n10995:R19C6B.FCO:R19C6C.FCI:0.000">     R19C6B.FCO to R19C6C.FCI    </A> <A href="#@net:n10995">n10995</A>
FCITOFCO_D  ---     0.162     R19C6C.FCI to     R19C6C.FCO <A href="#@comp:SLICE_69">SLICE_69</A>
ROUTE         1     0.000<A href="#@net:n10996:R19C6C.FCO:R19C6D.FCI:0.000">     R19C6C.FCO to R19C6D.FCI    </A> <A href="#@net:n10996">n10996</A>
FCITOFCO_D  ---     0.162     R19C6D.FCI to     R19C6D.FCO <A href="#@comp:SLICE_68">SLICE_68</A>
ROUTE         1     0.000<A href="#@net:n10997:R19C6D.FCO:R19C7A.FCI:0.000">     R19C6D.FCO to R19C7A.FCI    </A> <A href="#@net:n10997">n10997</A>
FCITOFCO_D  ---     0.162     R19C7A.FCI to     R19C7A.FCO <A href="#@comp:SLICE_67">SLICE_67</A>
ROUTE         1     0.000<A href="#@net:n10998:R19C7A.FCO:R19C7B.FCI:0.000">     R19C7A.FCO to R19C7B.FCI    </A> <A href="#@net:n10998">n10998</A>
FCITOFCO_D  ---     0.162     R19C7B.FCI to     R19C7B.FCO <A href="#@comp:SLICE_66">SLICE_66</A>
ROUTE         1     0.000<A href="#@net:n10999:R19C7B.FCO:R19C7C.FCI:0.000">     R19C7B.FCO to R19C7C.FCI    </A> <A href="#@net:n10999">n10999</A>
FCITOFCO_D  ---     0.162     R19C7C.FCI to     R19C7C.FCO <A href="#@comp:SLICE_65">SLICE_65</A>
ROUTE         1     0.000<A href="#@net:n11000:R19C7C.FCO:R19C7D.FCI:0.000">     R19C7C.FCO to R19C7D.FCI    </A> <A href="#@net:n11000">n11000</A>
FCITOFCO_D  ---     0.162     R19C7D.FCI to     R19C7D.FCO <A href="#@comp:SLICE_64">SLICE_64</A>
ROUTE         1     0.000<A href="#@net:n11001:R19C7D.FCO:R19C8A.FCI:0.000">     R19C7D.FCO to R19C8A.FCI    </A> <A href="#@net:n11001">n11001</A>
FCITOFCO_D  ---     0.162     R19C8A.FCI to     R19C8A.FCO <A href="#@comp:SLICE_63">SLICE_63</A>
ROUTE         1     0.000<A href="#@net:n11002:R19C8A.FCO:R19C8B.FCI:0.000">     R19C8A.FCO to R19C8B.FCI    </A> <A href="#@net:n11002">n11002</A>
FCITOFCO_D  ---     0.162     R19C8B.FCI to     R19C8B.FCO <A href="#@comp:SLICE_62">SLICE_62</A>
ROUTE         1     0.000<A href="#@net:n11003:R19C8B.FCO:R19C8C.FCI:0.000">     R19C8B.FCO to R19C8C.FCI    </A> <A href="#@net:n11003">n11003</A>
FCITOFCO_D  ---     0.162     R19C8C.FCI to     R19C8C.FCO <A href="#@comp:SLICE_61">SLICE_61</A>
ROUTE         1     0.000<A href="#@net:n11004:R19C8C.FCO:R19C8D.FCI:0.000">     R19C8C.FCO to R19C8D.FCI    </A> <A href="#@net:n11004">n11004</A>
FCITOFCO_D  ---     0.162     R19C8D.FCI to     R19C8D.FCO <A href="#@comp:SLICE_60">SLICE_60</A>
ROUTE         1     0.000<A href="#@net:n11005:R19C8D.FCO:R19C9A.FCI:0.000">     R19C8D.FCO to R19C9A.FCI    </A> <A href="#@net:n11005">n11005</A>
FCITOFCO_D  ---     0.162     R19C9A.FCI to     R19C9A.FCO <A href="#@comp:SLICE_59">SLICE_59</A>
ROUTE         1     0.000<A href="#@net:n11006:R19C9A.FCO:R19C9B.FCI:0.000">     R19C9A.FCO to R19C9B.FCI    </A> <A href="#@net:n11006">n11006</A>
FCITOFCO_D  ---     0.162     R19C9B.FCI to     R19C9B.FCO <A href="#@comp:SLICE_58">SLICE_58</A>
ROUTE         1     0.000<A href="#@net:n11007:R19C9B.FCO:R19C9C.FCI:0.000">     R19C9B.FCO to R19C9C.FCI    </A> <A href="#@net:n11007">n11007</A>
FCITOFCO_D  ---     0.162     R19C9C.FCI to     R19C9C.FCO <A href="#@comp:SLICE_57">SLICE_57</A>
ROUTE         1     0.000<A href="#@net:n11008:R19C9C.FCO:R19C9D.FCI:0.000">     R19C9C.FCO to R19C9D.FCI    </A> <A href="#@net:n11008">n11008</A>
FCITOFCO_D  ---     0.162     R19C9D.FCI to     R19C9D.FCO <A href="#@comp:SLICE_56">SLICE_56</A>
ROUTE         1     0.000<A href="#@net:n11009:R19C9D.FCO:R19C10A.FCI:0.000">     R19C9D.FCO to R19C10A.FCI   </A> <A href="#@net:n11009">n11009</A>
FCITOF1_DE  ---     0.643    R19C10A.FCI to     R19C10A.F1 <A href="#@comp:SLICE_55">SLICE_55</A>
ROUTE         1     0.000<A href="#@net:n2817:R19C10A.F1:R19C10A.DI1:0.000">     R19C10A.F1 to R19C10A.DI1   </A> <A href="#@net:n2817">n2817</A> (to <A href="#@net:osc_clk">osc_clk</A>)
                  --------
                   14.896   (59.2% logic, 40.8% route), 37 logic levels.

 Clock Skew Details: 

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.162,OSC.OSC,R21C8A.CLK,osc_clk">Source Clock Path</A> OSCH_inst to SLICE_2432:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.162<A href="#@net:osc_clk:OSC.OSC:R21C8A.CLK:4.162">        OSC.OSC to R21C8A.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.162   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.199,OSC.OSC,R19C10A.CLK,osc_clk">Destination Clock Path</A> OSCH_inst to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R19C10A.CLK:4.199">        OSC.OSC to R19C10A.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.
<font color=#FF0000> 

Error: The following path exceeds requirements by 3.742ns
 </font>
 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:SLICE_2432">o_Rx_DV_40</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    FF         Data in        <A href="#@comp:SLICE_55">phase_inc_carrGen_i0_i63</A>  (to <A href="#@net:osc_clk">osc_clk</A> +)

   Delay:              14.891ns  (58.0% logic, 42.0% route), 35 logic levels.

 Constraint Details:

     14.891ns physical path delay SLICE_2432 to SLICE_55 exceeds
     11.278ns delay constraint less
     -0.037ns skew and
      0.166ns DIN_SET requirement (totaling 11.149ns) by 3.742ns

 Physical Path Details:

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:REG_DEL, 0.452,R21C8A.CLK,R21C8A.Q0,SLICE_2432:ROUTE, 1.298,R21C8A.Q0,R21C16C.C0,o_Rx_DV:CTOF_DEL, 0.495,R21C16C.C0,R21C16C.F0,SLICE_2476:ROUTE, 1.495,R21C16C.F0,R19C14A.A0,n8250:CTOF_DEL, 0.495,R19C14A.A0,R19C14A.F0,SLICE_2372:ROUTE, 0.854,R19C14A.F0,R19C16C.C1,n13064:CTOF_DEL, 0.495,R19C16C.C1,R19C16C.F1,SLICE_2414:ROUTE, 0.436,R19C16C.F1,R19C16C.C0,n7753:CTOF_DEL, 0.495,R19C16C.C0,R19C16C.F0,SLICE_2414:ROUTE, 2.174,R19C16C.F0,R19C2D.C0,n2358:C0TOFCO_DEL, 1.023,R19C2D.C0,R19C2D.FCO,SLICE_84:ROUTE, 0.000,R19C2D.FCO,R19C3A.FCI,n10981:FCITOFCO_DEL, 0.162,R19C3A.FCI,R19C3A.FCO,SLICE_83:ROUTE, 0.000,R19C3A.FCO,R19C3B.FCI,n10982:FCITOFCO_DEL, 0.162,R19C3B.FCI,R19C3B.FCO,SLICE_82:ROUTE, 0.000,R19C3B.FCO,R19C3C.FCI,n10983:FCITOFCO_DEL, 0.162,R19C3C.FCI,R19C3C.FCO,SLICE_81:ROUTE, 0.000,R19C3C.FCO,R19C3D.FCI,n10984:FCITOFCO_DEL, 0.162,R19C3D.FCI,R19C3D.FCO,SLICE_80:ROUTE, 0.000,R19C3D.FCO,R19C4A.FCI,n10985:FCITOFCO_DEL, 0.162,R19C4A.FCI,R19C4A.FCO,SLICE_79:ROUTE, 0.000,R19C4A.FCO,R19C4B.FCI,n10986:FCITOFCO_DEL, 0.162,R19C4B.FCI,R19C4B.FCO,SLICE_78:ROUTE, 0.000,R19C4B.FCO,R19C4C.FCI,n10987:FCITOFCO_DEL, 0.162,R19C4C.FCI,R19C4C.FCO,SLICE_77:ROUTE, 0.000,R19C4C.FCO,R19C4D.FCI,n10988:FCITOFCO_DEL, 0.162,R19C4D.FCI,R19C4D.FCO,SLICE_76:ROUTE, 0.000,R19C4D.FCO,R19C5A.FCI,n10989:FCITOFCO_DEL, 0.162,R19C5A.FCI,R19C5A.FCO,SLICE_75:ROUTE, 0.000,R19C5A.FCO,R19C5B.FCI,n10990:FCITOFCO_DEL, 0.162,R19C5B.FCI,R19C5B.FCO,SLICE_74:ROUTE, 0.000,R19C5B.FCO,R19C5C.FCI,n10991:FCITOFCO_DEL, 0.162,R19C5C.FCI,R19C5C.FCO,SLICE_73:ROUTE, 0.000,R19C5C.FCO,R19C5D.FCI,n10992:FCITOFCO_DEL, 0.162,R19C5D.FCI,R19C5D.FCO,SLICE_72:ROUTE, 0.000,R19C5D.FCO,R19C6A.FCI,n10993:FCITOFCO_DEL, 0.162,R19C6A.FCI,R19C6A.FCO,SLICE_71:ROUTE, 0.000,R19C6A.FCO,R19C6B.FCI,n10994:FCITOFCO_DEL, 0.162,R19C6B.FCI,R19C6B.FCO,SLICE_70:ROUTE, 0.000,R19C6B.FCO,R19C6C.FCI,n10995:FCITOFCO_DEL, 0.162,R19C6C.FCI,R19C6C.FCO,SLICE_69:ROUTE, 0.000,R19C6C.FCO,R19C6D.FCI,n10996:FCITOFCO_DEL, 0.162,R19C6D.FCI,R19C6D.FCO,SLICE_68:ROUTE, 0.000,R19C6D.FCO,R19C7A.FCI,n10997:FCITOFCO_DEL, 0.162,R19C7A.FCI,R19C7A.FCO,SLICE_67:ROUTE, 0.000,R19C7A.FCO,R19C7B.FCI,n10998:FCITOFCO_DEL, 0.162,R19C7B.FCI,R19C7B.FCO,SLICE_66:ROUTE, 0.000,R19C7B.FCO,R19C7C.FCI,n10999:FCITOFCO_DEL, 0.162,R19C7C.FCI,R19C7C.FCO,SLICE_65:ROUTE, 0.000,R19C7C.FCO,R19C7D.FCI,n11000:FCITOFCO_DEL, 0.162,R19C7D.FCI,R19C7D.FCO,SLICE_64:ROUTE, 0.000,R19C7D.FCO,R19C8A.FCI,n11001:FCITOFCO_DEL, 0.162,R19C8A.FCI,R19C8A.FCO,SLICE_63:ROUTE, 0.000,R19C8A.FCO,R19C8B.FCI,n11002:FCITOFCO_DEL, 0.162,R19C8B.FCI,R19C8B.FCO,SLICE_62:ROUTE, 0.000,R19C8B.FCO,R19C8C.FCI,n11003:FCITOFCO_DEL, 0.162,R19C8C.FCI,R19C8C.FCO,SLICE_61:ROUTE, 0.000,R19C8C.FCO,R19C8D.FCI,n11004:FCITOFCO_DEL, 0.162,R19C8D.FCI,R19C8D.FCO,SLICE_60:ROUTE, 0.000,R19C8D.FCO,R19C9A.FCI,n11005:FCITOFCO_DEL, 0.162,R19C9A.FCI,R19C9A.FCO,SLICE_59:ROUTE, 0.000,R19C9A.FCO,R19C9B.FCI,n11006:FCITOFCO_DEL, 0.162,R19C9B.FCI,R19C9B.FCO,SLICE_58:ROUTE, 0.000,R19C9B.FCO,R19C9C.FCI,n11007:FCITOFCO_DEL, 0.162,R19C9C.FCI,R19C9C.FCO,SLICE_57:ROUTE, 0.000,R19C9C.FCO,R19C9D.FCI,n11008:FCITOFCO_DEL, 0.162,R19C9D.FCI,R19C9D.FCO,SLICE_56:ROUTE, 0.000,R19C9D.FCO,R19C10A.FCI,n11009:FCITOF1_DEL, 0.643,R19C10A.FCI,R19C10A.F1,SLICE_55:ROUTE, 0.000,R19C10A.F1,R19C10A.DI1,n2817">Data path</A> SLICE_2432 to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452     R21C8A.CLK to      R21C8A.Q0 <A href="#@comp:SLICE_2432">SLICE_2432</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         4     1.298<A href="#@net:o_Rx_DV:R21C8A.Q0:R21C16C.C0:1.298">      R21C8A.Q0 to R21C16C.C0    </A> <A href="#@net:o_Rx_DV">o_Rx_DV</A>
CTOF_DEL    ---     0.495     R21C16C.C0 to     R21C16C.F0 <A href="#@comp:SLICE_2476">SLICE_2476</A>
ROUTE         4     1.495<A href="#@net:n8250:R21C16C.F0:R19C14A.A0:1.495">     R21C16C.F0 to R19C14A.A0    </A> <A href="#@net:n8250">n8250</A>
CTOF_DEL    ---     0.495     R19C14A.A0 to     R19C14A.F0 <A href="#@comp:SLICE_2372">SLICE_2372</A>
ROUTE        44     0.854<A href="#@net:n13064:R19C14A.F0:R19C16C.C1:0.854">     R19C14A.F0 to R19C16C.C1    </A> <A href="#@net:n13064">n13064</A>
CTOF_DEL    ---     0.495     R19C16C.C1 to     R19C16C.F1 <A href="#@comp:SLICE_2414">SLICE_2414</A>
ROUTE         1     0.436<A href="#@net:n7753:R19C16C.F1:R19C16C.C0:0.436">     R19C16C.F1 to R19C16C.C0    </A> <A href="#@net:n7753">n7753</A>
CTOF_DEL    ---     0.495     R19C16C.C0 to     R19C16C.F0 <A href="#@comp:SLICE_2414">SLICE_2414</A>
ROUTE         1     2.174<A href="#@net:n2358:R19C16C.F0:R19C2D.C0:2.174">     R19C16C.F0 to R19C2D.C0     </A> <A href="#@net:n2358">n2358</A>
C0TOFCO_DE  ---     1.023      R19C2D.C0 to     R19C2D.FCO <A href="#@comp:SLICE_84">SLICE_84</A>
ROUTE         1     0.000<A href="#@net:n10981:R19C2D.FCO:R19C3A.FCI:0.000">     R19C2D.FCO to R19C3A.FCI    </A> <A href="#@net:n10981">n10981</A>
FCITOFCO_D  ---     0.162     R19C3A.FCI to     R19C3A.FCO <A href="#@comp:SLICE_83">SLICE_83</A>
ROUTE         1     0.000<A href="#@net:n10982:R19C3A.FCO:R19C3B.FCI:0.000">     R19C3A.FCO to R19C3B.FCI    </A> <A href="#@net:n10982">n10982</A>
FCITOFCO_D  ---     0.162     R19C3B.FCI to     R19C3B.FCO <A href="#@comp:SLICE_82">SLICE_82</A>
ROUTE         1     0.000<A href="#@net:n10983:R19C3B.FCO:R19C3C.FCI:0.000">     R19C3B.FCO to R19C3C.FCI    </A> <A href="#@net:n10983">n10983</A>
FCITOFCO_D  ---     0.162     R19C3C.FCI to     R19C3C.FCO <A href="#@comp:SLICE_81">SLICE_81</A>
ROUTE         1     0.000<A href="#@net:n10984:R19C3C.FCO:R19C3D.FCI:0.000">     R19C3C.FCO to R19C3D.FCI    </A> <A href="#@net:n10984">n10984</A>
FCITOFCO_D  ---     0.162     R19C3D.FCI to     R19C3D.FCO <A href="#@comp:SLICE_80">SLICE_80</A>
ROUTE         1     0.000<A href="#@net:n10985:R19C3D.FCO:R19C4A.FCI:0.000">     R19C3D.FCO to R19C4A.FCI    </A> <A href="#@net:n10985">n10985</A>
FCITOFCO_D  ---     0.162     R19C4A.FCI to     R19C4A.FCO <A href="#@comp:SLICE_79">SLICE_79</A>
ROUTE         1     0.000<A href="#@net:n10986:R19C4A.FCO:R19C4B.FCI:0.000">     R19C4A.FCO to R19C4B.FCI    </A> <A href="#@net:n10986">n10986</A>
FCITOFCO_D  ---     0.162     R19C4B.FCI to     R19C4B.FCO <A href="#@comp:SLICE_78">SLICE_78</A>
ROUTE         1     0.000<A href="#@net:n10987:R19C4B.FCO:R19C4C.FCI:0.000">     R19C4B.FCO to R19C4C.FCI    </A> <A href="#@net:n10987">n10987</A>
FCITOFCO_D  ---     0.162     R19C4C.FCI to     R19C4C.FCO <A href="#@comp:SLICE_77">SLICE_77</A>
ROUTE         1     0.000<A href="#@net:n10988:R19C4C.FCO:R19C4D.FCI:0.000">     R19C4C.FCO to R19C4D.FCI    </A> <A href="#@net:n10988">n10988</A>
FCITOFCO_D  ---     0.162     R19C4D.FCI to     R19C4D.FCO <A href="#@comp:SLICE_76">SLICE_76</A>
ROUTE         1     0.000<A href="#@net:n10989:R19C4D.FCO:R19C5A.FCI:0.000">     R19C4D.FCO to R19C5A.FCI    </A> <A href="#@net:n10989">n10989</A>
FCITOFCO_D  ---     0.162     R19C5A.FCI to     R19C5A.FCO <A href="#@comp:SLICE_75">SLICE_75</A>
ROUTE         1     0.000<A href="#@net:n10990:R19C5A.FCO:R19C5B.FCI:0.000">     R19C5A.FCO to R19C5B.FCI    </A> <A href="#@net:n10990">n10990</A>
FCITOFCO_D  ---     0.162     R19C5B.FCI to     R19C5B.FCO <A href="#@comp:SLICE_74">SLICE_74</A>
ROUTE         1     0.000<A href="#@net:n10991:R19C5B.FCO:R19C5C.FCI:0.000">     R19C5B.FCO to R19C5C.FCI    </A> <A href="#@net:n10991">n10991</A>
FCITOFCO_D  ---     0.162     R19C5C.FCI to     R19C5C.FCO <A href="#@comp:SLICE_73">SLICE_73</A>
ROUTE         1     0.000<A href="#@net:n10992:R19C5C.FCO:R19C5D.FCI:0.000">     R19C5C.FCO to R19C5D.FCI    </A> <A href="#@net:n10992">n10992</A>
FCITOFCO_D  ---     0.162     R19C5D.FCI to     R19C5D.FCO <A href="#@comp:SLICE_72">SLICE_72</A>
ROUTE         1     0.000<A href="#@net:n10993:R19C5D.FCO:R19C6A.FCI:0.000">     R19C5D.FCO to R19C6A.FCI    </A> <A href="#@net:n10993">n10993</A>
FCITOFCO_D  ---     0.162     R19C6A.FCI to     R19C6A.FCO <A href="#@comp:SLICE_71">SLICE_71</A>
ROUTE         1     0.000<A href="#@net:n10994:R19C6A.FCO:R19C6B.FCI:0.000">     R19C6A.FCO to R19C6B.FCI    </A> <A href="#@net:n10994">n10994</A>
FCITOFCO_D  ---     0.162     R19C6B.FCI to     R19C6B.FCO <A href="#@comp:SLICE_70">SLICE_70</A>
ROUTE         1     0.000<A href="#@net:n10995:R19C6B.FCO:R19C6C.FCI:0.000">     R19C6B.FCO to R19C6C.FCI    </A> <A href="#@net:n10995">n10995</A>
FCITOFCO_D  ---     0.162     R19C6C.FCI to     R19C6C.FCO <A href="#@comp:SLICE_69">SLICE_69</A>
ROUTE         1     0.000<A href="#@net:n10996:R19C6C.FCO:R19C6D.FCI:0.000">     R19C6C.FCO to R19C6D.FCI    </A> <A href="#@net:n10996">n10996</A>
FCITOFCO_D  ---     0.162     R19C6D.FCI to     R19C6D.FCO <A href="#@comp:SLICE_68">SLICE_68</A>
ROUTE         1     0.000<A href="#@net:n10997:R19C6D.FCO:R19C7A.FCI:0.000">     R19C6D.FCO to R19C7A.FCI    </A> <A href="#@net:n10997">n10997</A>
FCITOFCO_D  ---     0.162     R19C7A.FCI to     R19C7A.FCO <A href="#@comp:SLICE_67">SLICE_67</A>
ROUTE         1     0.000<A href="#@net:n10998:R19C7A.FCO:R19C7B.FCI:0.000">     R19C7A.FCO to R19C7B.FCI    </A> <A href="#@net:n10998">n10998</A>
FCITOFCO_D  ---     0.162     R19C7B.FCI to     R19C7B.FCO <A href="#@comp:SLICE_66">SLICE_66</A>
ROUTE         1     0.000<A href="#@net:n10999:R19C7B.FCO:R19C7C.FCI:0.000">     R19C7B.FCO to R19C7C.FCI    </A> <A href="#@net:n10999">n10999</A>
FCITOFCO_D  ---     0.162     R19C7C.FCI to     R19C7C.FCO <A href="#@comp:SLICE_65">SLICE_65</A>
ROUTE         1     0.000<A href="#@net:n11000:R19C7C.FCO:R19C7D.FCI:0.000">     R19C7C.FCO to R19C7D.FCI    </A> <A href="#@net:n11000">n11000</A>
FCITOFCO_D  ---     0.162     R19C7D.FCI to     R19C7D.FCO <A href="#@comp:SLICE_64">SLICE_64</A>
ROUTE         1     0.000<A href="#@net:n11001:R19C7D.FCO:R19C8A.FCI:0.000">     R19C7D.FCO to R19C8A.FCI    </A> <A href="#@net:n11001">n11001</A>
FCITOFCO_D  ---     0.162     R19C8A.FCI to     R19C8A.FCO <A href="#@comp:SLICE_63">SLICE_63</A>
ROUTE         1     0.000<A href="#@net:n11002:R19C8A.FCO:R19C8B.FCI:0.000">     R19C8A.FCO to R19C8B.FCI    </A> <A href="#@net:n11002">n11002</A>
FCITOFCO_D  ---     0.162     R19C8B.FCI to     R19C8B.FCO <A href="#@comp:SLICE_62">SLICE_62</A>
ROUTE         1     0.000<A href="#@net:n11003:R19C8B.FCO:R19C8C.FCI:0.000">     R19C8B.FCO to R19C8C.FCI    </A> <A href="#@net:n11003">n11003</A>
FCITOFCO_D  ---     0.162     R19C8C.FCI to     R19C8C.FCO <A href="#@comp:SLICE_61">SLICE_61</A>
ROUTE         1     0.000<A href="#@net:n11004:R19C8C.FCO:R19C8D.FCI:0.000">     R19C8C.FCO to R19C8D.FCI    </A> <A href="#@net:n11004">n11004</A>
FCITOFCO_D  ---     0.162     R19C8D.FCI to     R19C8D.FCO <A href="#@comp:SLICE_60">SLICE_60</A>
ROUTE         1     0.000<A href="#@net:n11005:R19C8D.FCO:R19C9A.FCI:0.000">     R19C8D.FCO to R19C9A.FCI    </A> <A href="#@net:n11005">n11005</A>
FCITOFCO_D  ---     0.162     R19C9A.FCI to     R19C9A.FCO <A href="#@comp:SLICE_59">SLICE_59</A>
ROUTE         1     0.000<A href="#@net:n11006:R19C9A.FCO:R19C9B.FCI:0.000">     R19C9A.FCO to R19C9B.FCI    </A> <A href="#@net:n11006">n11006</A>
FCITOFCO_D  ---     0.162     R19C9B.FCI to     R19C9B.FCO <A href="#@comp:SLICE_58">SLICE_58</A>
ROUTE         1     0.000<A href="#@net:n11007:R19C9B.FCO:R19C9C.FCI:0.000">     R19C9B.FCO to R19C9C.FCI    </A> <A href="#@net:n11007">n11007</A>
FCITOFCO_D  ---     0.162     R19C9C.FCI to     R19C9C.FCO <A href="#@comp:SLICE_57">SLICE_57</A>
ROUTE         1     0.000<A href="#@net:n11008:R19C9C.FCO:R19C9D.FCI:0.000">     R19C9C.FCO to R19C9D.FCI    </A> <A href="#@net:n11008">n11008</A>
FCITOFCO_D  ---     0.162     R19C9D.FCI to     R19C9D.FCO <A href="#@comp:SLICE_56">SLICE_56</A>
ROUTE         1     0.000<A href="#@net:n11009:R19C9D.FCO:R19C10A.FCI:0.000">     R19C9D.FCO to R19C10A.FCI   </A> <A href="#@net:n11009">n11009</A>
FCITOF1_DE  ---     0.643    R19C10A.FCI to     R19C10A.F1 <A href="#@comp:SLICE_55">SLICE_55</A>
ROUTE         1     0.000<A href="#@net:n2817:R19C10A.F1:R19C10A.DI1:0.000">     R19C10A.F1 to R19C10A.DI1   </A> <A href="#@net:n2817">n2817</A> (to <A href="#@net:osc_clk">osc_clk</A>)
                  --------
                   14.891   (58.0% logic, 42.0% route), 35 logic levels.

 Clock Skew Details: 

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.162,OSC.OSC,R21C8A.CLK,osc_clk">Source Clock Path</A> OSCH_inst to SLICE_2432:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.162<A href="#@net:osc_clk:OSC.OSC:R21C8A.CLK:4.162">        OSC.OSC to R21C8A.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.162   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.199,OSC.OSC,R19C10A.CLK,osc_clk">Destination Clock Path</A> OSCH_inst to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R19C10A.CLK:4.199">        OSC.OSC to R19C10A.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.
<font color=#FF0000> 

Error: The following path exceeds requirements by 3.710ns
 </font>
 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:SLICE_2432">o_Rx_DV_40</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    FF         Data in        <A href="#@comp:SLICE_56">phase_inc_carrGen_i0_i61</A>  (to <A href="#@net:osc_clk">osc_clk</A> +)

   Delay:              14.859ns  (57.0% logic, 43.0% route), 34 logic levels.

 Constraint Details:

     14.859ns physical path delay SLICE_2432 to SLICE_56 exceeds
     11.278ns delay constraint less
     -0.037ns skew and
      0.166ns DIN_SET requirement (totaling 11.149ns) by 3.710ns

 Physical Path Details:

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:REG_DEL, 0.452,R21C8A.CLK,R21C8A.Q0,SLICE_2432:ROUTE, 1.298,R21C8A.Q0,R21C16C.C0,o_Rx_DV:CTOF_DEL, 0.495,R21C16C.C0,R21C16C.F0,SLICE_2476:ROUTE, 1.160,R21C16C.F0,R19C17D.C0,n8250:CTOF_DEL, 0.495,R19C17D.C0,R19C17D.F0,SLICE_2435:ROUTE, 0.675,R19C17D.F0,R19C15B.D1,n12533:CTOF_DEL, 0.495,R19C15B.D1,R19C15B.F1,SLICE_2394:ROUTE, 1.080,R19C15B.F1,R19C16C.B0,n13057:CTOF_DEL, 0.495,R19C16C.B0,R19C16C.F0,SLICE_2414:ROUTE, 2.174,R19C16C.F0,R19C2D.C0,n2358:C0TOFCO_DEL, 1.023,R19C2D.C0,R19C2D.FCO,SLICE_84:ROUTE, 0.000,R19C2D.FCO,R19C3A.FCI,n10981:FCITOFCO_DEL, 0.162,R19C3A.FCI,R19C3A.FCO,SLICE_83:ROUTE, 0.000,R19C3A.FCO,R19C3B.FCI,n10982:FCITOFCO_DEL, 0.162,R19C3B.FCI,R19C3B.FCO,SLICE_82:ROUTE, 0.000,R19C3B.FCO,R19C3C.FCI,n10983:FCITOFCO_DEL, 0.162,R19C3C.FCI,R19C3C.FCO,SLICE_81:ROUTE, 0.000,R19C3C.FCO,R19C3D.FCI,n10984:FCITOFCO_DEL, 0.162,R19C3D.FCI,R19C3D.FCO,SLICE_80:ROUTE, 0.000,R19C3D.FCO,R19C4A.FCI,n10985:FCITOFCO_DEL, 0.162,R19C4A.FCI,R19C4A.FCO,SLICE_79:ROUTE, 0.000,R19C4A.FCO,R19C4B.FCI,n10986:FCITOFCO_DEL, 0.162,R19C4B.FCI,R19C4B.FCO,SLICE_78:ROUTE, 0.000,R19C4B.FCO,R19C4C.FCI,n10987:FCITOFCO_DEL, 0.162,R19C4C.FCI,R19C4C.FCO,SLICE_77:ROUTE, 0.000,R19C4C.FCO,R19C4D.FCI,n10988:FCITOFCO_DEL, 0.162,R19C4D.FCI,R19C4D.FCO,SLICE_76:ROUTE, 0.000,R19C4D.FCO,R19C5A.FCI,n10989:FCITOFCO_DEL, 0.162,R19C5A.FCI,R19C5A.FCO,SLICE_75:ROUTE, 0.000,R19C5A.FCO,R19C5B.FCI,n10990:FCITOFCO_DEL, 0.162,R19C5B.FCI,R19C5B.FCO,SLICE_74:ROUTE, 0.000,R19C5B.FCO,R19C5C.FCI,n10991:FCITOFCO_DEL, 0.162,R19C5C.FCI,R19C5C.FCO,SLICE_73:ROUTE, 0.000,R19C5C.FCO,R19C5D.FCI,n10992:FCITOFCO_DEL, 0.162,R19C5D.FCI,R19C5D.FCO,SLICE_72:ROUTE, 0.000,R19C5D.FCO,R19C6A.FCI,n10993:FCITOFCO_DEL, 0.162,R19C6A.FCI,R19C6A.FCO,SLICE_71:ROUTE, 0.000,R19C6A.FCO,R19C6B.FCI,n10994:FCITOFCO_DEL, 0.162,R19C6B.FCI,R19C6B.FCO,SLICE_70:ROUTE, 0.000,R19C6B.FCO,R19C6C.FCI,n10995:FCITOFCO_DEL, 0.162,R19C6C.FCI,R19C6C.FCO,SLICE_69:ROUTE, 0.000,R19C6C.FCO,R19C6D.FCI,n10996:FCITOFCO_DEL, 0.162,R19C6D.FCI,R19C6D.FCO,SLICE_68:ROUTE, 0.000,R19C6D.FCO,R19C7A.FCI,n10997:FCITOFCO_DEL, 0.162,R19C7A.FCI,R19C7A.FCO,SLICE_67:ROUTE, 0.000,R19C7A.FCO,R19C7B.FCI,n10998:FCITOFCO_DEL, 0.162,R19C7B.FCI,R19C7B.FCO,SLICE_66:ROUTE, 0.000,R19C7B.FCO,R19C7C.FCI,n10999:FCITOFCO_DEL, 0.162,R19C7C.FCI,R19C7C.FCO,SLICE_65:ROUTE, 0.000,R19C7C.FCO,R19C7D.FCI,n11000:FCITOFCO_DEL, 0.162,R19C7D.FCI,R19C7D.FCO,SLICE_64:ROUTE, 0.000,R19C7D.FCO,R19C8A.FCI,n11001:FCITOFCO_DEL, 0.162,R19C8A.FCI,R19C8A.FCO,SLICE_63:ROUTE, 0.000,R19C8A.FCO,R19C8B.FCI,n11002:FCITOFCO_DEL, 0.162,R19C8B.FCI,R19C8B.FCO,SLICE_62:ROUTE, 0.000,R19C8B.FCO,R19C8C.FCI,n11003:FCITOFCO_DEL, 0.162,R19C8C.FCI,R19C8C.FCO,SLICE_61:ROUTE, 0.000,R19C8C.FCO,R19C8D.FCI,n11004:FCITOFCO_DEL, 0.162,R19C8D.FCI,R19C8D.FCO,SLICE_60:ROUTE, 0.000,R19C8D.FCO,R19C9A.FCI,n11005:FCITOFCO_DEL, 0.162,R19C9A.FCI,R19C9A.FCO,SLICE_59:ROUTE, 0.000,R19C9A.FCO,R19C9B.FCI,n11006:FCITOFCO_DEL, 0.162,R19C9B.FCI,R19C9B.FCO,SLICE_58:ROUTE, 0.000,R19C9B.FCO,R19C9C.FCI,n11007:FCITOFCO_DEL, 0.162,R19C9C.FCI,R19C9C.FCO,SLICE_57:ROUTE, 0.000,R19C9C.FCO,R19C9D.FCI,n11008:FCITOF1_DEL, 0.643,R19C9D.FCI,R19C9D.F1,SLICE_56:ROUTE, 0.000,R19C9D.F1,R19C9D.DI1,n2819">Data path</A> SLICE_2432 to SLICE_56:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452     R21C8A.CLK to      R21C8A.Q0 <A href="#@comp:SLICE_2432">SLICE_2432</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         4     1.298<A href="#@net:o_Rx_DV:R21C8A.Q0:R21C16C.C0:1.298">      R21C8A.Q0 to R21C16C.C0    </A> <A href="#@net:o_Rx_DV">o_Rx_DV</A>
CTOF_DEL    ---     0.495     R21C16C.C0 to     R21C16C.F0 <A href="#@comp:SLICE_2476">SLICE_2476</A>
ROUTE         4     1.160<A href="#@net:n8250:R21C16C.F0:R19C17D.C0:1.160">     R21C16C.F0 to R19C17D.C0    </A> <A href="#@net:n8250">n8250</A>
CTOF_DEL    ---     0.495     R19C17D.C0 to     R19C17D.F0 <A href="#@comp:SLICE_2435">SLICE_2435</A>
ROUTE         5     0.675<A href="#@net:n12533:R19C17D.F0:R19C15B.D1:0.675">     R19C17D.F0 to R19C15B.D1    </A> <A href="#@net:n12533">n12533</A>
CTOF_DEL    ---     0.495     R19C15B.D1 to     R19C15B.F1 <A href="#@comp:SLICE_2394">SLICE_2394</A>
ROUTE        52     1.080<A href="#@net:n13057:R19C15B.F1:R19C16C.B0:1.080">     R19C15B.F1 to R19C16C.B0    </A> <A href="#@net:n13057">n13057</A>
CTOF_DEL    ---     0.495     R19C16C.B0 to     R19C16C.F0 <A href="#@comp:SLICE_2414">SLICE_2414</A>
ROUTE         1     2.174<A href="#@net:n2358:R19C16C.F0:R19C2D.C0:2.174">     R19C16C.F0 to R19C2D.C0     </A> <A href="#@net:n2358">n2358</A>
C0TOFCO_DE  ---     1.023      R19C2D.C0 to     R19C2D.FCO <A href="#@comp:SLICE_84">SLICE_84</A>
ROUTE         1     0.000<A href="#@net:n10981:R19C2D.FCO:R19C3A.FCI:0.000">     R19C2D.FCO to R19C3A.FCI    </A> <A href="#@net:n10981">n10981</A>
FCITOFCO_D  ---     0.162     R19C3A.FCI to     R19C3A.FCO <A href="#@comp:SLICE_83">SLICE_83</A>
ROUTE         1     0.000<A href="#@net:n10982:R19C3A.FCO:R19C3B.FCI:0.000">     R19C3A.FCO to R19C3B.FCI    </A> <A href="#@net:n10982">n10982</A>
FCITOFCO_D  ---     0.162     R19C3B.FCI to     R19C3B.FCO <A href="#@comp:SLICE_82">SLICE_82</A>
ROUTE         1     0.000<A href="#@net:n10983:R19C3B.FCO:R19C3C.FCI:0.000">     R19C3B.FCO to R19C3C.FCI    </A> <A href="#@net:n10983">n10983</A>
FCITOFCO_D  ---     0.162     R19C3C.FCI to     R19C3C.FCO <A href="#@comp:SLICE_81">SLICE_81</A>
ROUTE         1     0.000<A href="#@net:n10984:R19C3C.FCO:R19C3D.FCI:0.000">     R19C3C.FCO to R19C3D.FCI    </A> <A href="#@net:n10984">n10984</A>
FCITOFCO_D  ---     0.162     R19C3D.FCI to     R19C3D.FCO <A href="#@comp:SLICE_80">SLICE_80</A>
ROUTE         1     0.000<A href="#@net:n10985:R19C3D.FCO:R19C4A.FCI:0.000">     R19C3D.FCO to R19C4A.FCI    </A> <A href="#@net:n10985">n10985</A>
FCITOFCO_D  ---     0.162     R19C4A.FCI to     R19C4A.FCO <A href="#@comp:SLICE_79">SLICE_79</A>
ROUTE         1     0.000<A href="#@net:n10986:R19C4A.FCO:R19C4B.FCI:0.000">     R19C4A.FCO to R19C4B.FCI    </A> <A href="#@net:n10986">n10986</A>
FCITOFCO_D  ---     0.162     R19C4B.FCI to     R19C4B.FCO <A href="#@comp:SLICE_78">SLICE_78</A>
ROUTE         1     0.000<A href="#@net:n10987:R19C4B.FCO:R19C4C.FCI:0.000">     R19C4B.FCO to R19C4C.FCI    </A> <A href="#@net:n10987">n10987</A>
FCITOFCO_D  ---     0.162     R19C4C.FCI to     R19C4C.FCO <A href="#@comp:SLICE_77">SLICE_77</A>
ROUTE         1     0.000<A href="#@net:n10988:R19C4C.FCO:R19C4D.FCI:0.000">     R19C4C.FCO to R19C4D.FCI    </A> <A href="#@net:n10988">n10988</A>
FCITOFCO_D  ---     0.162     R19C4D.FCI to     R19C4D.FCO <A href="#@comp:SLICE_76">SLICE_76</A>
ROUTE         1     0.000<A href="#@net:n10989:R19C4D.FCO:R19C5A.FCI:0.000">     R19C4D.FCO to R19C5A.FCI    </A> <A href="#@net:n10989">n10989</A>
FCITOFCO_D  ---     0.162     R19C5A.FCI to     R19C5A.FCO <A href="#@comp:SLICE_75">SLICE_75</A>
ROUTE         1     0.000<A href="#@net:n10990:R19C5A.FCO:R19C5B.FCI:0.000">     R19C5A.FCO to R19C5B.FCI    </A> <A href="#@net:n10990">n10990</A>
FCITOFCO_D  ---     0.162     R19C5B.FCI to     R19C5B.FCO <A href="#@comp:SLICE_74">SLICE_74</A>
ROUTE         1     0.000<A href="#@net:n10991:R19C5B.FCO:R19C5C.FCI:0.000">     R19C5B.FCO to R19C5C.FCI    </A> <A href="#@net:n10991">n10991</A>
FCITOFCO_D  ---     0.162     R19C5C.FCI to     R19C5C.FCO <A href="#@comp:SLICE_73">SLICE_73</A>
ROUTE         1     0.000<A href="#@net:n10992:R19C5C.FCO:R19C5D.FCI:0.000">     R19C5C.FCO to R19C5D.FCI    </A> <A href="#@net:n10992">n10992</A>
FCITOFCO_D  ---     0.162     R19C5D.FCI to     R19C5D.FCO <A href="#@comp:SLICE_72">SLICE_72</A>
ROUTE         1     0.000<A href="#@net:n10993:R19C5D.FCO:R19C6A.FCI:0.000">     R19C5D.FCO to R19C6A.FCI    </A> <A href="#@net:n10993">n10993</A>
FCITOFCO_D  ---     0.162     R19C6A.FCI to     R19C6A.FCO <A href="#@comp:SLICE_71">SLICE_71</A>
ROUTE         1     0.000<A href="#@net:n10994:R19C6A.FCO:R19C6B.FCI:0.000">     R19C6A.FCO to R19C6B.FCI    </A> <A href="#@net:n10994">n10994</A>
FCITOFCO_D  ---     0.162     R19C6B.FCI to     R19C6B.FCO <A href="#@comp:SLICE_70">SLICE_70</A>
ROUTE         1     0.000<A href="#@net:n10995:R19C6B.FCO:R19C6C.FCI:0.000">     R19C6B.FCO to R19C6C.FCI    </A> <A href="#@net:n10995">n10995</A>
FCITOFCO_D  ---     0.162     R19C6C.FCI to     R19C6C.FCO <A href="#@comp:SLICE_69">SLICE_69</A>
ROUTE         1     0.000<A href="#@net:n10996:R19C6C.FCO:R19C6D.FCI:0.000">     R19C6C.FCO to R19C6D.FCI    </A> <A href="#@net:n10996">n10996</A>
FCITOFCO_D  ---     0.162     R19C6D.FCI to     R19C6D.FCO <A href="#@comp:SLICE_68">SLICE_68</A>
ROUTE         1     0.000<A href="#@net:n10997:R19C6D.FCO:R19C7A.FCI:0.000">     R19C6D.FCO to R19C7A.FCI    </A> <A href="#@net:n10997">n10997</A>
FCITOFCO_D  ---     0.162     R19C7A.FCI to     R19C7A.FCO <A href="#@comp:SLICE_67">SLICE_67</A>
ROUTE         1     0.000<A href="#@net:n10998:R19C7A.FCO:R19C7B.FCI:0.000">     R19C7A.FCO to R19C7B.FCI    </A> <A href="#@net:n10998">n10998</A>
FCITOFCO_D  ---     0.162     R19C7B.FCI to     R19C7B.FCO <A href="#@comp:SLICE_66">SLICE_66</A>
ROUTE         1     0.000<A href="#@net:n10999:R19C7B.FCO:R19C7C.FCI:0.000">     R19C7B.FCO to R19C7C.FCI    </A> <A href="#@net:n10999">n10999</A>
FCITOFCO_D  ---     0.162     R19C7C.FCI to     R19C7C.FCO <A href="#@comp:SLICE_65">SLICE_65</A>
ROUTE         1     0.000<A href="#@net:n11000:R19C7C.FCO:R19C7D.FCI:0.000">     R19C7C.FCO to R19C7D.FCI    </A> <A href="#@net:n11000">n11000</A>
FCITOFCO_D  ---     0.162     R19C7D.FCI to     R19C7D.FCO <A href="#@comp:SLICE_64">SLICE_64</A>
ROUTE         1     0.000<A href="#@net:n11001:R19C7D.FCO:R19C8A.FCI:0.000">     R19C7D.FCO to R19C8A.FCI    </A> <A href="#@net:n11001">n11001</A>
FCITOFCO_D  ---     0.162     R19C8A.FCI to     R19C8A.FCO <A href="#@comp:SLICE_63">SLICE_63</A>
ROUTE         1     0.000<A href="#@net:n11002:R19C8A.FCO:R19C8B.FCI:0.000">     R19C8A.FCO to R19C8B.FCI    </A> <A href="#@net:n11002">n11002</A>
FCITOFCO_D  ---     0.162     R19C8B.FCI to     R19C8B.FCO <A href="#@comp:SLICE_62">SLICE_62</A>
ROUTE         1     0.000<A href="#@net:n11003:R19C8B.FCO:R19C8C.FCI:0.000">     R19C8B.FCO to R19C8C.FCI    </A> <A href="#@net:n11003">n11003</A>
FCITOFCO_D  ---     0.162     R19C8C.FCI to     R19C8C.FCO <A href="#@comp:SLICE_61">SLICE_61</A>
ROUTE         1     0.000<A href="#@net:n11004:R19C8C.FCO:R19C8D.FCI:0.000">     R19C8C.FCO to R19C8D.FCI    </A> <A href="#@net:n11004">n11004</A>
FCITOFCO_D  ---     0.162     R19C8D.FCI to     R19C8D.FCO <A href="#@comp:SLICE_60">SLICE_60</A>
ROUTE         1     0.000<A href="#@net:n11005:R19C8D.FCO:R19C9A.FCI:0.000">     R19C8D.FCO to R19C9A.FCI    </A> <A href="#@net:n11005">n11005</A>
FCITOFCO_D  ---     0.162     R19C9A.FCI to     R19C9A.FCO <A href="#@comp:SLICE_59">SLICE_59</A>
ROUTE         1     0.000<A href="#@net:n11006:R19C9A.FCO:R19C9B.FCI:0.000">     R19C9A.FCO to R19C9B.FCI    </A> <A href="#@net:n11006">n11006</A>
FCITOFCO_D  ---     0.162     R19C9B.FCI to     R19C9B.FCO <A href="#@comp:SLICE_58">SLICE_58</A>
ROUTE         1     0.000<A href="#@net:n11007:R19C9B.FCO:R19C9C.FCI:0.000">     R19C9B.FCO to R19C9C.FCI    </A> <A href="#@net:n11007">n11007</A>
FCITOFCO_D  ---     0.162     R19C9C.FCI to     R19C9C.FCO <A href="#@comp:SLICE_57">SLICE_57</A>
ROUTE         1     0.000<A href="#@net:n11008:R19C9C.FCO:R19C9D.FCI:0.000">     R19C9C.FCO to R19C9D.FCI    </A> <A href="#@net:n11008">n11008</A>
FCITOF1_DE  ---     0.643     R19C9D.FCI to      R19C9D.F1 <A href="#@comp:SLICE_56">SLICE_56</A>
ROUTE         1     0.000<A href="#@net:n2819:R19C9D.F1:R19C9D.DI1:0.000">      R19C9D.F1 to R19C9D.DI1    </A> <A href="#@net:n2819">n2819</A> (to <A href="#@net:osc_clk">osc_clk</A>)
                  --------
                   14.859   (57.0% logic, 43.0% route), 34 logic levels.

 Clock Skew Details: 

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.162,OSC.OSC,R21C8A.CLK,osc_clk">Source Clock Path</A> OSCH_inst to SLICE_2432:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.162<A href="#@net:osc_clk:OSC.OSC:R21C8A.CLK:4.162">        OSC.OSC to R21C8A.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.162   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.199,OSC.OSC,R19C9D.CLK,osc_clk">Destination Clock Path</A> OSCH_inst to SLICE_56:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R19C9D.CLK:4.199">        OSC.OSC to R19C9D.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.
<font color=#FF0000> 

Error: The following path exceeds requirements by 3.708ns
 </font>
 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:SLICE_84">phase_inc_carrGen_i0_i5</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    FF         Data in        <A href="#@comp:SLICE_55">phase_inc_carrGen_i0_i62</A>  (to <A href="#@net:osc_clk">osc_clk</A> +)

   Delay:              14.821ns  (60.2% logic, 39.8% route), 33 logic levels.

 Constraint Details:

     14.821ns physical path delay SLICE_84 to SLICE_55 exceeds
     11.278ns delay constraint less
     -0.001ns skew and
      0.166ns DIN_SET requirement (totaling 11.113ns) by 3.708ns

 Physical Path Details:

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:REG_DEL, 0.452,R19C2D.CLK,R19C2D.Q1,SLICE_84:ROUTE, 1.426,R19C2D.Q1,R18C4B.A0,phase_inc_carrGen_5:C0TOFCO_DEL, 1.023,R18C4B.A0,R18C4B.FCO,SLICE_131:ROUTE, 0.000,R18C4B.FCO,R18C4C.FCI,n10808:FCITOFCO_DEL, 0.162,R18C4C.FCI,R18C4C.FCO,SLICE_130:ROUTE, 0.000,R18C4C.FCO,R18C4D.FCI,n10809:FCITOFCO_DEL, 0.162,R18C4D.FCI,R18C4D.FCO,SLICE_129:ROUTE, 0.000,R18C4D.FCO,R18C5A.FCI,n10810:FCITOFCO_DEL, 0.162,R18C5A.FCI,R18C5A.FCO,SLICE_128:ROUTE, 0.000,R18C5A.FCO,R18C5B.FCI,n10811:FCITOFCO_DEL, 0.162,R18C5B.FCI,R18C5B.FCO,SLICE_127:ROUTE, 0.000,R18C5B.FCO,R18C5C.FCI,n10812:FCITOFCO_DEL, 0.162,R18C5C.FCI,R18C5C.FCO,SLICE_126:ROUTE, 0.000,R18C5C.FCO,R18C5D.FCI,n10813:FCITOFCO_DEL, 0.162,R18C5D.FCI,R18C5D.FCO,SLICE_125:ROUTE, 0.000,R18C5D.FCO,R18C6A.FCI,n10814:FCITOFCO_DEL, 0.162,R18C6A.FCI,R18C6A.FCO,SLICE_124:ROUTE, 0.000,R18C6A.FCO,R18C6B.FCI,n10815:FCITOFCO_DEL, 0.162,R18C6B.FCI,R18C6B.FCO,SLICE_123:ROUTE, 0.000,R18C6B.FCO,R18C6C.FCI,n10816:FCITOFCO_DEL, 0.162,R18C6C.FCI,R18C6C.FCO,SLICE_122:ROUTE, 0.000,R18C6C.FCO,R18C6D.FCI,n10817:FCITOFCO_DEL, 0.162,R18C6D.FCI,R18C6D.FCO,SLICE_121:ROUTE, 0.000,R18C6D.FCO,R18C7A.FCI,n10818:FCITOFCO_DEL, 0.162,R18C7A.FCI,R18C7A.FCO,SLICE_120:ROUTE, 0.000,R18C7A.FCO,R18C7B.FCI,n10819:FCITOFCO_DEL, 0.162,R18C7B.FCI,R18C7B.FCO,SLICE_119:ROUTE, 0.000,R18C7B.FCO,R18C7C.FCI,n10820:FCITOFCO_DEL, 0.162,R18C7C.FCI,R18C7C.FCO,SLICE_118:ROUTE, 0.000,R18C7C.FCO,R18C7D.FCI,n10821:FCITOFCO_DEL, 0.162,R18C7D.FCI,R18C7D.FCO,SLICE_117:ROUTE, 0.000,R18C7D.FCO,R18C8A.FCI,n10822:FCITOFCO_DEL, 0.162,R18C8A.FCI,R18C8A.FCO,SLICE_116:ROUTE, 0.000,R18C8A.FCO,R18C8B.FCI,n10823:FCITOF1_DEL, 0.643,R18C8B.FCI,R18C8B.F1,SLICE_115:ROUTE, 1.278,R18C8B.F1,R18C15A.C0,n1056:CTOF_DEL, 0.495,R18C15A.C0,R18C15A.F0,SLICE_2482:ROUTE, 1.001,R18C15A.F0,R19C15B.B0,n7813:CTOF_DEL, 0.495,R19C15B.B0,R19C15B.F0,SLICE_2394:ROUTE, 2.188,R19C15B.F0,R19C7A.C0,n2324:C0TOFCO_DEL, 1.023,R19C7A.C0,R19C7A.FCO,SLICE_67:ROUTE, 0.000,R19C7A.FCO,R19C7B.FCI,n10998:FCITOFCO_DEL, 0.162,R19C7B.FCI,R19C7B.FCO,SLICE_66:ROUTE, 0.000,R19C7B.FCO,R19C7C.FCI,n10999:FCITOFCO_DEL, 0.162,R19C7C.FCI,R19C7C.FCO,SLICE_65:ROUTE, 0.000,R19C7C.FCO,R19C7D.FCI,n11000:FCITOFCO_DEL, 0.162,R19C7D.FCI,R19C7D.FCO,SLICE_64:ROUTE, 0.000,R19C7D.FCO,R19C8A.FCI,n11001:FCITOFCO_DEL, 0.162,R19C8A.FCI,R19C8A.FCO,SLICE_63:ROUTE, 0.000,R19C8A.FCO,R19C8B.FCI,n11002:FCITOFCO_DEL, 0.162,R19C8B.FCI,R19C8B.FCO,SLICE_62:ROUTE, 0.000,R19C8B.FCO,R19C8C.FCI,n11003:FCITOFCO_DEL, 0.162,R19C8C.FCI,R19C8C.FCO,SLICE_61:ROUTE, 0.000,R19C8C.FCO,R19C8D.FCI,n11004:FCITOFCO_DEL, 0.162,R19C8D.FCI,R19C8D.FCO,SLICE_60:ROUTE, 0.000,R19C8D.FCO,R19C9A.FCI,n11005:FCITOFCO_DEL, 0.162,R19C9A.FCI,R19C9A.FCO,SLICE_59:ROUTE, 0.000,R19C9A.FCO,R19C9B.FCI,n11006:FCITOFCO_DEL, 0.162,R19C9B.FCI,R19C9B.FCO,SLICE_58:ROUTE, 0.000,R19C9B.FCO,R19C9C.FCI,n11007:FCITOFCO_DEL, 0.162,R19C9C.FCI,R19C9C.FCO,SLICE_57:ROUTE, 0.000,R19C9C.FCO,R19C9D.FCI,n11008:FCITOFCO_DEL, 0.162,R19C9D.FCI,R19C9D.FCO,SLICE_56:ROUTE, 0.000,R19C9D.FCO,R19C10A.FCI,n11009:FCITOF0_DEL, 0.585,R19C10A.FCI,R19C10A.F0,SLICE_55:ROUTE, 0.000,R19C10A.F0,R19C10A.DI0,n2818">Data path</A> SLICE_84 to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452     R19C2D.CLK to      R19C2D.Q1 <A href="#@comp:SLICE_84">SLICE_84</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         4     1.426<A href="#@net:phase_inc_carrGen_5:R19C2D.Q1:R18C4B.A0:1.426">      R19C2D.Q1 to R18C4B.A0     </A> <A href="#@net:phase_inc_carrGen_5">phase_inc_carrGen_5</A>
C0TOFCO_DE  ---     1.023      R18C4B.A0 to     R18C4B.FCO <A href="#@comp:SLICE_131">SLICE_131</A>
ROUTE         1     0.000<A href="#@net:n10808:R18C4B.FCO:R18C4C.FCI:0.000">     R18C4B.FCO to R18C4C.FCI    </A> <A href="#@net:n10808">n10808</A>
FCITOFCO_D  ---     0.162     R18C4C.FCI to     R18C4C.FCO <A href="#@comp:SLICE_130">SLICE_130</A>
ROUTE         1     0.000<A href="#@net:n10809:R18C4C.FCO:R18C4D.FCI:0.000">     R18C4C.FCO to R18C4D.FCI    </A> <A href="#@net:n10809">n10809</A>
FCITOFCO_D  ---     0.162     R18C4D.FCI to     R18C4D.FCO <A href="#@comp:SLICE_129">SLICE_129</A>
ROUTE         1     0.000<A href="#@net:n10810:R18C4D.FCO:R18C5A.FCI:0.000">     R18C4D.FCO to R18C5A.FCI    </A> <A href="#@net:n10810">n10810</A>
FCITOFCO_D  ---     0.162     R18C5A.FCI to     R18C5A.FCO <A href="#@comp:SLICE_128">SLICE_128</A>
ROUTE         1     0.000<A href="#@net:n10811:R18C5A.FCO:R18C5B.FCI:0.000">     R18C5A.FCO to R18C5B.FCI    </A> <A href="#@net:n10811">n10811</A>
FCITOFCO_D  ---     0.162     R18C5B.FCI to     R18C5B.FCO <A href="#@comp:SLICE_127">SLICE_127</A>
ROUTE         1     0.000<A href="#@net:n10812:R18C5B.FCO:R18C5C.FCI:0.000">     R18C5B.FCO to R18C5C.FCI    </A> <A href="#@net:n10812">n10812</A>
FCITOFCO_D  ---     0.162     R18C5C.FCI to     R18C5C.FCO <A href="#@comp:SLICE_126">SLICE_126</A>
ROUTE         1     0.000<A href="#@net:n10813:R18C5C.FCO:R18C5D.FCI:0.000">     R18C5C.FCO to R18C5D.FCI    </A> <A href="#@net:n10813">n10813</A>
FCITOFCO_D  ---     0.162     R18C5D.FCI to     R18C5D.FCO <A href="#@comp:SLICE_125">SLICE_125</A>
ROUTE         1     0.000<A href="#@net:n10814:R18C5D.FCO:R18C6A.FCI:0.000">     R18C5D.FCO to R18C6A.FCI    </A> <A href="#@net:n10814">n10814</A>
FCITOFCO_D  ---     0.162     R18C6A.FCI to     R18C6A.FCO <A href="#@comp:SLICE_124">SLICE_124</A>
ROUTE         1     0.000<A href="#@net:n10815:R18C6A.FCO:R18C6B.FCI:0.000">     R18C6A.FCO to R18C6B.FCI    </A> <A href="#@net:n10815">n10815</A>
FCITOFCO_D  ---     0.162     R18C6B.FCI to     R18C6B.FCO <A href="#@comp:SLICE_123">SLICE_123</A>
ROUTE         1     0.000<A href="#@net:n10816:R18C6B.FCO:R18C6C.FCI:0.000">     R18C6B.FCO to R18C6C.FCI    </A> <A href="#@net:n10816">n10816</A>
FCITOFCO_D  ---     0.162     R18C6C.FCI to     R18C6C.FCO <A href="#@comp:SLICE_122">SLICE_122</A>
ROUTE         1     0.000<A href="#@net:n10817:R18C6C.FCO:R18C6D.FCI:0.000">     R18C6C.FCO to R18C6D.FCI    </A> <A href="#@net:n10817">n10817</A>
FCITOFCO_D  ---     0.162     R18C6D.FCI to     R18C6D.FCO <A href="#@comp:SLICE_121">SLICE_121</A>
ROUTE         1     0.000<A href="#@net:n10818:R18C6D.FCO:R18C7A.FCI:0.000">     R18C6D.FCO to R18C7A.FCI    </A> <A href="#@net:n10818">n10818</A>
FCITOFCO_D  ---     0.162     R18C7A.FCI to     R18C7A.FCO <A href="#@comp:SLICE_120">SLICE_120</A>
ROUTE         1     0.000<A href="#@net:n10819:R18C7A.FCO:R18C7B.FCI:0.000">     R18C7A.FCO to R18C7B.FCI    </A> <A href="#@net:n10819">n10819</A>
FCITOFCO_D  ---     0.162     R18C7B.FCI to     R18C7B.FCO <A href="#@comp:SLICE_119">SLICE_119</A>
ROUTE         1     0.000<A href="#@net:n10820:R18C7B.FCO:R18C7C.FCI:0.000">     R18C7B.FCO to R18C7C.FCI    </A> <A href="#@net:n10820">n10820</A>
FCITOFCO_D  ---     0.162     R18C7C.FCI to     R18C7C.FCO <A href="#@comp:SLICE_118">SLICE_118</A>
ROUTE         1     0.000<A href="#@net:n10821:R18C7C.FCO:R18C7D.FCI:0.000">     R18C7C.FCO to R18C7D.FCI    </A> <A href="#@net:n10821">n10821</A>
FCITOFCO_D  ---     0.162     R18C7D.FCI to     R18C7D.FCO <A href="#@comp:SLICE_117">SLICE_117</A>
ROUTE         1     0.000<A href="#@net:n10822:R18C7D.FCO:R18C8A.FCI:0.000">     R18C7D.FCO to R18C8A.FCI    </A> <A href="#@net:n10822">n10822</A>
FCITOFCO_D  ---     0.162     R18C8A.FCI to     R18C8A.FCO <A href="#@comp:SLICE_116">SLICE_116</A>
ROUTE         1     0.000<A href="#@net:n10823:R18C8A.FCO:R18C8B.FCI:0.000">     R18C8A.FCO to R18C8B.FCI    </A> <A href="#@net:n10823">n10823</A>
FCITOF1_DE  ---     0.643     R18C8B.FCI to      R18C8B.F1 <A href="#@comp:SLICE_115">SLICE_115</A>
ROUTE         1     1.278<A href="#@net:n1056:R18C8B.F1:R18C15A.C0:1.278">      R18C8B.F1 to R18C15A.C0    </A> <A href="#@net:n1056">n1056</A>
CTOF_DEL    ---     0.495     R18C15A.C0 to     R18C15A.F0 <A href="#@comp:SLICE_2482">SLICE_2482</A>
ROUTE         1     1.001<A href="#@net:n7813:R18C15A.F0:R19C15B.B0:1.001">     R18C15A.F0 to R19C15B.B0    </A> <A href="#@net:n7813">n7813</A>
CTOF_DEL    ---     0.495     R19C15B.B0 to     R19C15B.F0 <A href="#@comp:SLICE_2394">SLICE_2394</A>
ROUTE         1     2.188<A href="#@net:n2324:R19C15B.F0:R19C7A.C0:2.188">     R19C15B.F0 to R19C7A.C0     </A> <A href="#@net:n2324">n2324</A>
C0TOFCO_DE  ---     1.023      R19C7A.C0 to     R19C7A.FCO <A href="#@comp:SLICE_67">SLICE_67</A>
ROUTE         1     0.000<A href="#@net:n10998:R19C7A.FCO:R19C7B.FCI:0.000">     R19C7A.FCO to R19C7B.FCI    </A> <A href="#@net:n10998">n10998</A>
FCITOFCO_D  ---     0.162     R19C7B.FCI to     R19C7B.FCO <A href="#@comp:SLICE_66">SLICE_66</A>
ROUTE         1     0.000<A href="#@net:n10999:R19C7B.FCO:R19C7C.FCI:0.000">     R19C7B.FCO to R19C7C.FCI    </A> <A href="#@net:n10999">n10999</A>
FCITOFCO_D  ---     0.162     R19C7C.FCI to     R19C7C.FCO <A href="#@comp:SLICE_65">SLICE_65</A>
ROUTE         1     0.000<A href="#@net:n11000:R19C7C.FCO:R19C7D.FCI:0.000">     R19C7C.FCO to R19C7D.FCI    </A> <A href="#@net:n11000">n11000</A>
FCITOFCO_D  ---     0.162     R19C7D.FCI to     R19C7D.FCO <A href="#@comp:SLICE_64">SLICE_64</A>
ROUTE         1     0.000<A href="#@net:n11001:R19C7D.FCO:R19C8A.FCI:0.000">     R19C7D.FCO to R19C8A.FCI    </A> <A href="#@net:n11001">n11001</A>
FCITOFCO_D  ---     0.162     R19C8A.FCI to     R19C8A.FCO <A href="#@comp:SLICE_63">SLICE_63</A>
ROUTE         1     0.000<A href="#@net:n11002:R19C8A.FCO:R19C8B.FCI:0.000">     R19C8A.FCO to R19C8B.FCI    </A> <A href="#@net:n11002">n11002</A>
FCITOFCO_D  ---     0.162     R19C8B.FCI to     R19C8B.FCO <A href="#@comp:SLICE_62">SLICE_62</A>
ROUTE         1     0.000<A href="#@net:n11003:R19C8B.FCO:R19C8C.FCI:0.000">     R19C8B.FCO to R19C8C.FCI    </A> <A href="#@net:n11003">n11003</A>
FCITOFCO_D  ---     0.162     R19C8C.FCI to     R19C8C.FCO <A href="#@comp:SLICE_61">SLICE_61</A>
ROUTE         1     0.000<A href="#@net:n11004:R19C8C.FCO:R19C8D.FCI:0.000">     R19C8C.FCO to R19C8D.FCI    </A> <A href="#@net:n11004">n11004</A>
FCITOFCO_D  ---     0.162     R19C8D.FCI to     R19C8D.FCO <A href="#@comp:SLICE_60">SLICE_60</A>
ROUTE         1     0.000<A href="#@net:n11005:R19C8D.FCO:R19C9A.FCI:0.000">     R19C8D.FCO to R19C9A.FCI    </A> <A href="#@net:n11005">n11005</A>
FCITOFCO_D  ---     0.162     R19C9A.FCI to     R19C9A.FCO <A href="#@comp:SLICE_59">SLICE_59</A>
ROUTE         1     0.000<A href="#@net:n11006:R19C9A.FCO:R19C9B.FCI:0.000">     R19C9A.FCO to R19C9B.FCI    </A> <A href="#@net:n11006">n11006</A>
FCITOFCO_D  ---     0.162     R19C9B.FCI to     R19C9B.FCO <A href="#@comp:SLICE_58">SLICE_58</A>
ROUTE         1     0.000<A href="#@net:n11007:R19C9B.FCO:R19C9C.FCI:0.000">     R19C9B.FCO to R19C9C.FCI    </A> <A href="#@net:n11007">n11007</A>
FCITOFCO_D  ---     0.162     R19C9C.FCI to     R19C9C.FCO <A href="#@comp:SLICE_57">SLICE_57</A>
ROUTE         1     0.000<A href="#@net:n11008:R19C9C.FCO:R19C9D.FCI:0.000">     R19C9C.FCO to R19C9D.FCI    </A> <A href="#@net:n11008">n11008</A>
FCITOFCO_D  ---     0.162     R19C9D.FCI to     R19C9D.FCO <A href="#@comp:SLICE_56">SLICE_56</A>
ROUTE         1     0.000<A href="#@net:n11009:R19C9D.FCO:R19C10A.FCI:0.000">     R19C9D.FCO to R19C10A.FCI   </A> <A href="#@net:n11009">n11009</A>
FCITOF0_DE  ---     0.585    R19C10A.FCI to     R19C10A.F0 <A href="#@comp:SLICE_55">SLICE_55</A>
ROUTE         1     0.000<A href="#@net:n2818:R19C10A.F0:R19C10A.DI0:0.000">     R19C10A.F0 to R19C10A.DI0   </A> <A href="#@net:n2818">n2818</A> (to <A href="#@net:osc_clk">osc_clk</A>)
                  --------
                   14.821   (60.2% logic, 39.8% route), 33 logic levels.

 Clock Skew Details: 

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.198,OSC.OSC,R19C2D.CLK,osc_clk">Source Clock Path</A> OSCH_inst to SLICE_84:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.198<A href="#@net:osc_clk:OSC.OSC:R19C2D.CLK:4.198">        OSC.OSC to R19C2D.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.198   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.199,OSC.OSC,R19C10A.CLK,osc_clk">Destination Clock Path</A> OSCH_inst to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R19C10A.CLK:4.199">        OSC.OSC to R19C10A.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.
<font color=#FF0000> 

Error: The following path exceeds requirements by 3.689ns
 </font>
 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:SLICE_2432">o_Rx_DV_40</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    FF         Data in        <A href="#@comp:SLICE_55">phase_inc_carrGen_i0_i63</A>  (to <A href="#@net:osc_clk">osc_clk</A> +)

   Delay:              14.838ns  (57.3% logic, 42.7% route), 35 logic levels.

 Constraint Details:

     14.838ns physical path delay SLICE_2432 to SLICE_55 exceeds
     11.278ns delay constraint less
     -0.037ns skew and
      0.166ns DIN_SET requirement (totaling 11.149ns) by 3.689ns

 Physical Path Details:

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:REG_DEL, 0.452,R21C8A.CLK,R21C8A.Q0,SLICE_2432:ROUTE, 1.298,R21C8A.Q0,R21C16C.C0,o_Rx_DV:CTOF_DEL, 0.495,R21C16C.C0,R21C16C.F0,SLICE_2476:ROUTE, 1.160,R21C16C.F0,R19C17D.C0,n8250:CTOF_DEL, 0.495,R19C17D.C0,R19C17D.F0,SLICE_2435:ROUTE, 0.675,R19C17D.F0,R19C15B.D1,n12533:CTOF_DEL, 0.495,R19C15B.D1,R19C15B.F1,SLICE_2394:ROUTE, 1.624,R19C15B.F1,R19C10D.D0,n13057:CTOF_DEL, 0.495,R19C10D.D0,R19C10D.F0,SLICE_2416:ROUTE, 1.581,R19C10D.F0,R19C2D.C1,n2357:C1TOFCO_DEL, 0.889,R19C2D.C1,R19C2D.FCO,SLICE_84:ROUTE, 0.000,R19C2D.FCO,R19C3A.FCI,n10981:FCITOFCO_DEL, 0.162,R19C3A.FCI,R19C3A.FCO,SLICE_83:ROUTE, 0.000,R19C3A.FCO,R19C3B.FCI,n10982:FCITOFCO_DEL, 0.162,R19C3B.FCI,R19C3B.FCO,SLICE_82:ROUTE, 0.000,R19C3B.FCO,R19C3C.FCI,n10983:FCITOFCO_DEL, 0.162,R19C3C.FCI,R19C3C.FCO,SLICE_81:ROUTE, 0.000,R19C3C.FCO,R19C3D.FCI,n10984:FCITOFCO_DEL, 0.162,R19C3D.FCI,R19C3D.FCO,SLICE_80:ROUTE, 0.000,R19C3D.FCO,R19C4A.FCI,n10985:FCITOFCO_DEL, 0.162,R19C4A.FCI,R19C4A.FCO,SLICE_79:ROUTE, 0.000,R19C4A.FCO,R19C4B.FCI,n10986:FCITOFCO_DEL, 0.162,R19C4B.FCI,R19C4B.FCO,SLICE_78:ROUTE, 0.000,R19C4B.FCO,R19C4C.FCI,n10987:FCITOFCO_DEL, 0.162,R19C4C.FCI,R19C4C.FCO,SLICE_77:ROUTE, 0.000,R19C4C.FCO,R19C4D.FCI,n10988:FCITOFCO_DEL, 0.162,R19C4D.FCI,R19C4D.FCO,SLICE_76:ROUTE, 0.000,R19C4D.FCO,R19C5A.FCI,n10989:FCITOFCO_DEL, 0.162,R19C5A.FCI,R19C5A.FCO,SLICE_75:ROUTE, 0.000,R19C5A.FCO,R19C5B.FCI,n10990:FCITOFCO_DEL, 0.162,R19C5B.FCI,R19C5B.FCO,SLICE_74:ROUTE, 0.000,R19C5B.FCO,R19C5C.FCI,n10991:FCITOFCO_DEL, 0.162,R19C5C.FCI,R19C5C.FCO,SLICE_73:ROUTE, 0.000,R19C5C.FCO,R19C5D.FCI,n10992:FCITOFCO_DEL, 0.162,R19C5D.FCI,R19C5D.FCO,SLICE_72:ROUTE, 0.000,R19C5D.FCO,R19C6A.FCI,n10993:FCITOFCO_DEL, 0.162,R19C6A.FCI,R19C6A.FCO,SLICE_71:ROUTE, 0.000,R19C6A.FCO,R19C6B.FCI,n10994:FCITOFCO_DEL, 0.162,R19C6B.FCI,R19C6B.FCO,SLICE_70:ROUTE, 0.000,R19C6B.FCO,R19C6C.FCI,n10995:FCITOFCO_DEL, 0.162,R19C6C.FCI,R19C6C.FCO,SLICE_69:ROUTE, 0.000,R19C6C.FCO,R19C6D.FCI,n10996:FCITOFCO_DEL, 0.162,R19C6D.FCI,R19C6D.FCO,SLICE_68:ROUTE, 0.000,R19C6D.FCO,R19C7A.FCI,n10997:FCITOFCO_DEL, 0.162,R19C7A.FCI,R19C7A.FCO,SLICE_67:ROUTE, 0.000,R19C7A.FCO,R19C7B.FCI,n10998:FCITOFCO_DEL, 0.162,R19C7B.FCI,R19C7B.FCO,SLICE_66:ROUTE, 0.000,R19C7B.FCO,R19C7C.FCI,n10999:FCITOFCO_DEL, 0.162,R19C7C.FCI,R19C7C.FCO,SLICE_65:ROUTE, 0.000,R19C7C.FCO,R19C7D.FCI,n11000:FCITOFCO_DEL, 0.162,R19C7D.FCI,R19C7D.FCO,SLICE_64:ROUTE, 0.000,R19C7D.FCO,R19C8A.FCI,n11001:FCITOFCO_DEL, 0.162,R19C8A.FCI,R19C8A.FCO,SLICE_63:ROUTE, 0.000,R19C8A.FCO,R19C8B.FCI,n11002:FCITOFCO_DEL, 0.162,R19C8B.FCI,R19C8B.FCO,SLICE_62:ROUTE, 0.000,R19C8B.FCO,R19C8C.FCI,n11003:FCITOFCO_DEL, 0.162,R19C8C.FCI,R19C8C.FCO,SLICE_61:ROUTE, 0.000,R19C8C.FCO,R19C8D.FCI,n11004:FCITOFCO_DEL, 0.162,R19C8D.FCI,R19C8D.FCO,SLICE_60:ROUTE, 0.000,R19C8D.FCO,R19C9A.FCI,n11005:FCITOFCO_DEL, 0.162,R19C9A.FCI,R19C9A.FCO,SLICE_59:ROUTE, 0.000,R19C9A.FCO,R19C9B.FCI,n11006:FCITOFCO_DEL, 0.162,R19C9B.FCI,R19C9B.FCO,SLICE_58:ROUTE, 0.000,R19C9B.FCO,R19C9C.FCI,n11007:FCITOFCO_DEL, 0.162,R19C9C.FCI,R19C9C.FCO,SLICE_57:ROUTE, 0.000,R19C9C.FCO,R19C9D.FCI,n11008:FCITOFCO_DEL, 0.162,R19C9D.FCI,R19C9D.FCO,SLICE_56:ROUTE, 0.000,R19C9D.FCO,R19C10A.FCI,n11009:FCITOF1_DEL, 0.643,R19C10A.FCI,R19C10A.F1,SLICE_55:ROUTE, 0.000,R19C10A.F1,R19C10A.DI1,n2817">Data path</A> SLICE_2432 to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452     R21C8A.CLK to      R21C8A.Q0 <A href="#@comp:SLICE_2432">SLICE_2432</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         4     1.298<A href="#@net:o_Rx_DV:R21C8A.Q0:R21C16C.C0:1.298">      R21C8A.Q0 to R21C16C.C0    </A> <A href="#@net:o_Rx_DV">o_Rx_DV</A>
CTOF_DEL    ---     0.495     R21C16C.C0 to     R21C16C.F0 <A href="#@comp:SLICE_2476">SLICE_2476</A>
ROUTE         4     1.160<A href="#@net:n8250:R21C16C.F0:R19C17D.C0:1.160">     R21C16C.F0 to R19C17D.C0    </A> <A href="#@net:n8250">n8250</A>
CTOF_DEL    ---     0.495     R19C17D.C0 to     R19C17D.F0 <A href="#@comp:SLICE_2435">SLICE_2435</A>
ROUTE         5     0.675<A href="#@net:n12533:R19C17D.F0:R19C15B.D1:0.675">     R19C17D.F0 to R19C15B.D1    </A> <A href="#@net:n12533">n12533</A>
CTOF_DEL    ---     0.495     R19C15B.D1 to     R19C15B.F1 <A href="#@comp:SLICE_2394">SLICE_2394</A>
ROUTE        52     1.624<A href="#@net:n13057:R19C15B.F1:R19C10D.D0:1.624">     R19C15B.F1 to R19C10D.D0    </A> <A href="#@net:n13057">n13057</A>
CTOF_DEL    ---     0.495     R19C10D.D0 to     R19C10D.F0 <A href="#@comp:SLICE_2416">SLICE_2416</A>
ROUTE         1     1.581<A href="#@net:n2357:R19C10D.F0:R19C2D.C1:1.581">     R19C10D.F0 to R19C2D.C1     </A> <A href="#@net:n2357">n2357</A>
C1TOFCO_DE  ---     0.889      R19C2D.C1 to     R19C2D.FCO <A href="#@comp:SLICE_84">SLICE_84</A>
ROUTE         1     0.000<A href="#@net:n10981:R19C2D.FCO:R19C3A.FCI:0.000">     R19C2D.FCO to R19C3A.FCI    </A> <A href="#@net:n10981">n10981</A>
FCITOFCO_D  ---     0.162     R19C3A.FCI to     R19C3A.FCO <A href="#@comp:SLICE_83">SLICE_83</A>
ROUTE         1     0.000<A href="#@net:n10982:R19C3A.FCO:R19C3B.FCI:0.000">     R19C3A.FCO to R19C3B.FCI    </A> <A href="#@net:n10982">n10982</A>
FCITOFCO_D  ---     0.162     R19C3B.FCI to     R19C3B.FCO <A href="#@comp:SLICE_82">SLICE_82</A>
ROUTE         1     0.000<A href="#@net:n10983:R19C3B.FCO:R19C3C.FCI:0.000">     R19C3B.FCO to R19C3C.FCI    </A> <A href="#@net:n10983">n10983</A>
FCITOFCO_D  ---     0.162     R19C3C.FCI to     R19C3C.FCO <A href="#@comp:SLICE_81">SLICE_81</A>
ROUTE         1     0.000<A href="#@net:n10984:R19C3C.FCO:R19C3D.FCI:0.000">     R19C3C.FCO to R19C3D.FCI    </A> <A href="#@net:n10984">n10984</A>
FCITOFCO_D  ---     0.162     R19C3D.FCI to     R19C3D.FCO <A href="#@comp:SLICE_80">SLICE_80</A>
ROUTE         1     0.000<A href="#@net:n10985:R19C3D.FCO:R19C4A.FCI:0.000">     R19C3D.FCO to R19C4A.FCI    </A> <A href="#@net:n10985">n10985</A>
FCITOFCO_D  ---     0.162     R19C4A.FCI to     R19C4A.FCO <A href="#@comp:SLICE_79">SLICE_79</A>
ROUTE         1     0.000<A href="#@net:n10986:R19C4A.FCO:R19C4B.FCI:0.000">     R19C4A.FCO to R19C4B.FCI    </A> <A href="#@net:n10986">n10986</A>
FCITOFCO_D  ---     0.162     R19C4B.FCI to     R19C4B.FCO <A href="#@comp:SLICE_78">SLICE_78</A>
ROUTE         1     0.000<A href="#@net:n10987:R19C4B.FCO:R19C4C.FCI:0.000">     R19C4B.FCO to R19C4C.FCI    </A> <A href="#@net:n10987">n10987</A>
FCITOFCO_D  ---     0.162     R19C4C.FCI to     R19C4C.FCO <A href="#@comp:SLICE_77">SLICE_77</A>
ROUTE         1     0.000<A href="#@net:n10988:R19C4C.FCO:R19C4D.FCI:0.000">     R19C4C.FCO to R19C4D.FCI    </A> <A href="#@net:n10988">n10988</A>
FCITOFCO_D  ---     0.162     R19C4D.FCI to     R19C4D.FCO <A href="#@comp:SLICE_76">SLICE_76</A>
ROUTE         1     0.000<A href="#@net:n10989:R19C4D.FCO:R19C5A.FCI:0.000">     R19C4D.FCO to R19C5A.FCI    </A> <A href="#@net:n10989">n10989</A>
FCITOFCO_D  ---     0.162     R19C5A.FCI to     R19C5A.FCO <A href="#@comp:SLICE_75">SLICE_75</A>
ROUTE         1     0.000<A href="#@net:n10990:R19C5A.FCO:R19C5B.FCI:0.000">     R19C5A.FCO to R19C5B.FCI    </A> <A href="#@net:n10990">n10990</A>
FCITOFCO_D  ---     0.162     R19C5B.FCI to     R19C5B.FCO <A href="#@comp:SLICE_74">SLICE_74</A>
ROUTE         1     0.000<A href="#@net:n10991:R19C5B.FCO:R19C5C.FCI:0.000">     R19C5B.FCO to R19C5C.FCI    </A> <A href="#@net:n10991">n10991</A>
FCITOFCO_D  ---     0.162     R19C5C.FCI to     R19C5C.FCO <A href="#@comp:SLICE_73">SLICE_73</A>
ROUTE         1     0.000<A href="#@net:n10992:R19C5C.FCO:R19C5D.FCI:0.000">     R19C5C.FCO to R19C5D.FCI    </A> <A href="#@net:n10992">n10992</A>
FCITOFCO_D  ---     0.162     R19C5D.FCI to     R19C5D.FCO <A href="#@comp:SLICE_72">SLICE_72</A>
ROUTE         1     0.000<A href="#@net:n10993:R19C5D.FCO:R19C6A.FCI:0.000">     R19C5D.FCO to R19C6A.FCI    </A> <A href="#@net:n10993">n10993</A>
FCITOFCO_D  ---     0.162     R19C6A.FCI to     R19C6A.FCO <A href="#@comp:SLICE_71">SLICE_71</A>
ROUTE         1     0.000<A href="#@net:n10994:R19C6A.FCO:R19C6B.FCI:0.000">     R19C6A.FCO to R19C6B.FCI    </A> <A href="#@net:n10994">n10994</A>
FCITOFCO_D  ---     0.162     R19C6B.FCI to     R19C6B.FCO <A href="#@comp:SLICE_70">SLICE_70</A>
ROUTE         1     0.000<A href="#@net:n10995:R19C6B.FCO:R19C6C.FCI:0.000">     R19C6B.FCO to R19C6C.FCI    </A> <A href="#@net:n10995">n10995</A>
FCITOFCO_D  ---     0.162     R19C6C.FCI to     R19C6C.FCO <A href="#@comp:SLICE_69">SLICE_69</A>
ROUTE         1     0.000<A href="#@net:n10996:R19C6C.FCO:R19C6D.FCI:0.000">     R19C6C.FCO to R19C6D.FCI    </A> <A href="#@net:n10996">n10996</A>
FCITOFCO_D  ---     0.162     R19C6D.FCI to     R19C6D.FCO <A href="#@comp:SLICE_68">SLICE_68</A>
ROUTE         1     0.000<A href="#@net:n10997:R19C6D.FCO:R19C7A.FCI:0.000">     R19C6D.FCO to R19C7A.FCI    </A> <A href="#@net:n10997">n10997</A>
FCITOFCO_D  ---     0.162     R19C7A.FCI to     R19C7A.FCO <A href="#@comp:SLICE_67">SLICE_67</A>
ROUTE         1     0.000<A href="#@net:n10998:R19C7A.FCO:R19C7B.FCI:0.000">     R19C7A.FCO to R19C7B.FCI    </A> <A href="#@net:n10998">n10998</A>
FCITOFCO_D  ---     0.162     R19C7B.FCI to     R19C7B.FCO <A href="#@comp:SLICE_66">SLICE_66</A>
ROUTE         1     0.000<A href="#@net:n10999:R19C7B.FCO:R19C7C.FCI:0.000">     R19C7B.FCO to R19C7C.FCI    </A> <A href="#@net:n10999">n10999</A>
FCITOFCO_D  ---     0.162     R19C7C.FCI to     R19C7C.FCO <A href="#@comp:SLICE_65">SLICE_65</A>
ROUTE         1     0.000<A href="#@net:n11000:R19C7C.FCO:R19C7D.FCI:0.000">     R19C7C.FCO to R19C7D.FCI    </A> <A href="#@net:n11000">n11000</A>
FCITOFCO_D  ---     0.162     R19C7D.FCI to     R19C7D.FCO <A href="#@comp:SLICE_64">SLICE_64</A>
ROUTE         1     0.000<A href="#@net:n11001:R19C7D.FCO:R19C8A.FCI:0.000">     R19C7D.FCO to R19C8A.FCI    </A> <A href="#@net:n11001">n11001</A>
FCITOFCO_D  ---     0.162     R19C8A.FCI to     R19C8A.FCO <A href="#@comp:SLICE_63">SLICE_63</A>
ROUTE         1     0.000<A href="#@net:n11002:R19C8A.FCO:R19C8B.FCI:0.000">     R19C8A.FCO to R19C8B.FCI    </A> <A href="#@net:n11002">n11002</A>
FCITOFCO_D  ---     0.162     R19C8B.FCI to     R19C8B.FCO <A href="#@comp:SLICE_62">SLICE_62</A>
ROUTE         1     0.000<A href="#@net:n11003:R19C8B.FCO:R19C8C.FCI:0.000">     R19C8B.FCO to R19C8C.FCI    </A> <A href="#@net:n11003">n11003</A>
FCITOFCO_D  ---     0.162     R19C8C.FCI to     R19C8C.FCO <A href="#@comp:SLICE_61">SLICE_61</A>
ROUTE         1     0.000<A href="#@net:n11004:R19C8C.FCO:R19C8D.FCI:0.000">     R19C8C.FCO to R19C8D.FCI    </A> <A href="#@net:n11004">n11004</A>
FCITOFCO_D  ---     0.162     R19C8D.FCI to     R19C8D.FCO <A href="#@comp:SLICE_60">SLICE_60</A>
ROUTE         1     0.000<A href="#@net:n11005:R19C8D.FCO:R19C9A.FCI:0.000">     R19C8D.FCO to R19C9A.FCI    </A> <A href="#@net:n11005">n11005</A>
FCITOFCO_D  ---     0.162     R19C9A.FCI to     R19C9A.FCO <A href="#@comp:SLICE_59">SLICE_59</A>
ROUTE         1     0.000<A href="#@net:n11006:R19C9A.FCO:R19C9B.FCI:0.000">     R19C9A.FCO to R19C9B.FCI    </A> <A href="#@net:n11006">n11006</A>
FCITOFCO_D  ---     0.162     R19C9B.FCI to     R19C9B.FCO <A href="#@comp:SLICE_58">SLICE_58</A>
ROUTE         1     0.000<A href="#@net:n11007:R19C9B.FCO:R19C9C.FCI:0.000">     R19C9B.FCO to R19C9C.FCI    </A> <A href="#@net:n11007">n11007</A>
FCITOFCO_D  ---     0.162     R19C9C.FCI to     R19C9C.FCO <A href="#@comp:SLICE_57">SLICE_57</A>
ROUTE         1     0.000<A href="#@net:n11008:R19C9C.FCO:R19C9D.FCI:0.000">     R19C9C.FCO to R19C9D.FCI    </A> <A href="#@net:n11008">n11008</A>
FCITOFCO_D  ---     0.162     R19C9D.FCI to     R19C9D.FCO <A href="#@comp:SLICE_56">SLICE_56</A>
ROUTE         1     0.000<A href="#@net:n11009:R19C9D.FCO:R19C10A.FCI:0.000">     R19C9D.FCO to R19C10A.FCI   </A> <A href="#@net:n11009">n11009</A>
FCITOF1_DE  ---     0.643    R19C10A.FCI to     R19C10A.F1 <A href="#@comp:SLICE_55">SLICE_55</A>
ROUTE         1     0.000<A href="#@net:n2817:R19C10A.F1:R19C10A.DI1:0.000">     R19C10A.F1 to R19C10A.DI1   </A> <A href="#@net:n2817">n2817</A> (to <A href="#@net:osc_clk">osc_clk</A>)
                  --------
                   14.838   (57.3% logic, 42.7% route), 35 logic levels.

 Clock Skew Details: 

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.162,OSC.OSC,R21C8A.CLK,osc_clk">Source Clock Path</A> OSCH_inst to SLICE_2432:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.162<A href="#@net:osc_clk:OSC.OSC:R21C8A.CLK:4.162">        OSC.OSC to R21C8A.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.162   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:FREQUENCY NET 'osc_clk' 88.670000 MHz ;:ROUTE, 4.199,OSC.OSC,R19C10A.CLK,osc_clk">Destination Clock Path</A> OSCH_inst to SLICE_55:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R19C10A.CLK:4.199">        OSC.OSC to R19C10A.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.

Warning:  66.007MHz is the maximum frequency for this preference.


</A><A name="CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk"></A>================================================================================
Preference: CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET "osc_clk" ; Setup Analysis.
            10 items scored, 0 timing errors detected.
--------------------------------------------------------------------------------


Passed:  The following path meets requirements by 5.279ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:PWM1/SLICE_6">PWM1/PWMOut_15</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:PWMOut">PWMOut</A>

   Data Path Delay:    10.522ns  (37.1% logic, 62.9% route), 2 logic levels.

   Clock Path Delay:    4.199ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      4.199ns delay OSCH_inst to PWM1/SLICE_6 and
     10.522ns delay PWM1/SLICE_6 to PWMOut (totaling 14.721ns) meets
     20.000ns offset OSCH_inst to PWMOut by 5.279ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 4.199,OSC.OSC,R12C25B.CLK,osc_clk">Clock path</A> OSCH_inst to PWM1/SLICE_6:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R12C25B.CLK:4.199">        OSC.OSC to R12C25B.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.452,R12C25B.CLK,R12C25B.Q1,PWM1/SLICE_6:ROUTE, 6.622,R12C25B.Q1,43.PADDO,PWMOutP4_c:DOPAD_DEL, 3.448,43.PADDO,43.PAD,PWMOut">Data path</A> PWM1/SLICE_6 to PWMOut:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452    R12C25B.CLK to     R12C25B.Q1 <A href="#@comp:PWM1/SLICE_6">PWM1/SLICE_6</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         6     6.622<A href="#@net:PWMOutP4_c:R12C25B.Q1:43.PADDO:6.622">     R12C25B.Q1 to 43.PADDO      </A> <A href="#@net:PWMOutP4_c">PWMOutP4_c</A>
DOPAD_DEL   ---     3.448       43.PADDO to         43.PAD <A href="#@comp:PWMOut">PWMOut</A>
                  --------
                   10.522   (37.1% logic, 62.9% route), 2 logic levels.


Passed:  The following path meets requirements by 5.772ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:SLICE_2468">o_Rx_Byte_i1</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:MYLED[6]">MYLED[6]</A>

   Data Path Delay:    10.066ns  (32.3% logic, 67.7% route), 2 logic levels.

   Clock Path Delay:    4.162ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      4.162ns delay OSCH_inst to SLICE_2468 and
     10.066ns delay SLICE_2468 to MYLED[6] (totaling 14.228ns) meets
     20.000ns offset OSCH_inst to MYLED[6] by 5.772ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 4.162,OSC.OSC,R21C11D.CLK,osc_clk">Clock path</A> OSCH_inst to SLICE_2468:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.162<A href="#@net:osc_clk:OSC.OSC:R21C11D.CLK:4.162">        OSC.OSC to R21C11D.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.162   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.452,R21C11D.CLK,R21C11D.Q0,SLICE_2468:ROUTE, 6.817,R21C11D.Q0,106.PADDO,MYLED_c_6:DOPAD_DEL, 2.797,106.PADDO,106.PAD,MYLED[6]">Data path</A> SLICE_2468 to MYLED[6]:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452    R21C11D.CLK to     R21C11D.Q0 <A href="#@comp:SLICE_2468">SLICE_2468</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE        11     6.817<A href="#@net:MYLED_c_6:R21C11D.Q0:106.PADDO:6.817">     R21C11D.Q0 to 106.PADDO     </A> <A href="#@net:MYLED_c_6">MYLED_c_6</A>
DOPAD_DEL   ---     2.797      106.PADDO to        106.PAD <A href="#@comp:MYLED[6]">MYLED[6]</A>
                  --------
                   10.066   (32.3% logic, 67.7% route), 2 logic levels.


Passed:  The following path meets requirements by 6.313ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:ncoGen/SLICE_725">ncoGen/phase_accum_i63</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:sinGen">sinGen</A>

   Data Path Delay:     9.525ns  (46.1% logic, 53.9% route), 3 logic levels.

   Clock Path Delay:    4.162ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      4.162ns delay OSCH_inst to ncoGen/SLICE_725 and
      9.525ns delay ncoGen/SLICE_725 to sinGen (totaling 13.687ns) meets
     20.000ns offset OSCH_inst to sinGen by 6.313ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 4.162,OSC.OSC,R21C25D.CLK,osc_clk">Clock path</A> OSCH_inst to ncoGen/SLICE_725:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.162<A href="#@net:osc_clk:OSC.OSC:R21C25D.CLK:4.162">        OSC.OSC to R21C25D.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.162   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.452,R21C25D.CLK,R21C25D.Q1,ncoGen/SLICE_725:ROUTE, 4.144,R21C25D.Q1,R2C9A.D0,phase_accum_63:CTOF_DEL, 0.495,R2C9A.D0,R2C9A.F0,ncoGen/SLICE_2511:ROUTE, 0.986,R2C9A.F0,142.PADDO,sinGen_c:DOPAD_DEL, 3.448,142.PADDO,142.PAD,sinGen">Data path</A> ncoGen/SLICE_725 to sinGen:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452    R21C25D.CLK to     R21C25D.Q1 <A href="#@comp:ncoGen/SLICE_725">ncoGen/SLICE_725</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         3     4.144<A href="#@net:phase_accum_63:R21C25D.Q1:R2C9A.D0:4.144">     R21C25D.Q1 to R2C9A.D0      </A> <A href="#@net:phase_accum_63">phase_accum_63</A>
CTOF_DEL    ---     0.495       R2C9A.D0 to       R2C9A.F0 <A href="#@comp:ncoGen/SLICE_2511">ncoGen/SLICE_2511</A>
ROUTE         1     0.986<A href="#@net:sinGen_c:R2C9A.F0:142.PADDO:0.986">       R2C9A.F0 to 142.PADDO     </A> <A href="#@net:sinGen_c">sinGen_c</A>
DOPAD_DEL   ---     3.448      142.PADDO to        142.PAD <A href="#@comp:sinGen">sinGen</A>
                  --------
                    9.525   (46.1% logic, 53.9% route), 3 logic levels.


Passed:  The following path meets requirements by 6.471ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:PWM1/SLICE_6">PWM1/PWMOut_15</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:PWMOutN2">PWMOutN2</A>

   Data Path Delay:     9.330ns  (47.1% logic, 52.9% route), 3 logic levels.

   Clock Path Delay:    4.199ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      4.199ns delay OSCH_inst to PWM1/SLICE_6 and
      9.330ns delay PWM1/SLICE_6 to PWMOutN2 (totaling 13.529ns) meets
     20.000ns offset OSCH_inst to PWMOutN2 by 6.471ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 4.199,OSC.OSC,R12C25B.CLK,osc_clk">Clock path</A> OSCH_inst to PWM1/SLICE_6:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R12C25B.CLK:4.199">        OSC.OSC to R12C25B.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.452,R12C25B.CLK,R12C25B.Q1,PWM1/SLICE_6:ROUTE, 3.259,R12C25B.Q1,R25C38B.C0,PWMOutP4_c:CTOF_DEL, 0.495,R25C38B.C0,R25C38B.F0,SLICE_2495:ROUTE, 1.676,R25C38B.F0,67.PADDO,PWMOutN4_c:DOPAD_DEL, 3.448,67.PADDO,67.PAD,PWMOutN2">Data path</A> PWM1/SLICE_6 to PWMOutN2:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452    R12C25B.CLK to     R12C25B.Q1 <A href="#@comp:PWM1/SLICE_6">PWM1/SLICE_6</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         6     3.259<A href="#@net:PWMOutP4_c:R12C25B.Q1:R25C38B.C0:3.259">     R12C25B.Q1 to R25C38B.C0    </A> <A href="#@net:PWMOutP4_c">PWMOutP4_c</A>
CTOF_DEL    ---     0.495     R25C38B.C0 to     R25C38B.F0 <A href="#@comp:SLICE_2495">SLICE_2495</A>
ROUTE         4     1.676<A href="#@net:PWMOutN4_c:R25C38B.F0:67.PADDO:1.676">     R25C38B.F0 to 67.PADDO      </A> <A href="#@net:PWMOutN4_c">PWMOutN4_c</A>
DOPAD_DEL   ---     3.448       67.PADDO to         67.PAD <A href="#@comp:PWMOutN2">PWMOutN2</A>
                  --------
                    9.330   (47.1% logic, 52.9% route), 3 logic levels.


Passed:  The following path meets requirements by 6.471ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:PWM1/SLICE_6">PWM1/PWMOut_15</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:PWMOutN1">PWMOutN1</A>

   Data Path Delay:     9.330ns  (47.1% logic, 52.9% route), 3 logic levels.

   Clock Path Delay:    4.199ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      4.199ns delay OSCH_inst to PWM1/SLICE_6 and
      9.330ns delay PWM1/SLICE_6 to PWMOutN1 (totaling 13.529ns) meets
     20.000ns offset OSCH_inst to PWMOutN1 by 6.471ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 4.199,OSC.OSC,R12C25B.CLK,osc_clk">Clock path</A> OSCH_inst to PWM1/SLICE_6:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R12C25B.CLK:4.199">        OSC.OSC to R12C25B.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.452,R12C25B.CLK,R12C25B.Q1,PWM1/SLICE_6:ROUTE, 3.259,R12C25B.Q1,R25C38B.C0,PWMOutP4_c:CTOF_DEL, 0.495,R25C38B.C0,R25C38B.F0,SLICE_2495:ROUTE, 1.676,R25C38B.F0,65.PADDO,PWMOutN4_c:DOPAD_DEL, 3.448,65.PADDO,65.PAD,PWMOutN1">Data path</A> PWM1/SLICE_6 to PWMOutN1:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452    R12C25B.CLK to     R12C25B.Q1 <A href="#@comp:PWM1/SLICE_6">PWM1/SLICE_6</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         6     3.259<A href="#@net:PWMOutP4_c:R12C25B.Q1:R25C38B.C0:3.259">     R12C25B.Q1 to R25C38B.C0    </A> <A href="#@net:PWMOutP4_c">PWMOutP4_c</A>
CTOF_DEL    ---     0.495     R25C38B.C0 to     R25C38B.F0 <A href="#@comp:SLICE_2495">SLICE_2495</A>
ROUTE         4     1.676<A href="#@net:PWMOutN4_c:R25C38B.F0:65.PADDO:1.676">     R25C38B.F0 to 65.PADDO      </A> <A href="#@net:PWMOutN4_c">PWMOutN4_c</A>
DOPAD_DEL   ---     3.448       65.PADDO to         65.PAD <A href="#@comp:PWMOutN1">PWMOutN1</A>
                  --------
                    9.330   (47.1% logic, 52.9% route), 3 logic levels.


Passed:  The following path meets requirements by 6.772ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:PWM1/SLICE_6">PWM1/PWMOut_15</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:PWMOutP2">PWMOutP2</A>

   Data Path Delay:     9.029ns  (43.2% logic, 56.8% route), 2 logic levels.

   Clock Path Delay:    4.199ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      4.199ns delay OSCH_inst to PWM1/SLICE_6 and
      9.029ns delay PWM1/SLICE_6 to PWMOutP2 (totaling 13.228ns) meets
     20.000ns offset OSCH_inst to PWMOutP2 by 6.772ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 4.199,OSC.OSC,R12C25B.CLK,osc_clk">Clock path</A> OSCH_inst to PWM1/SLICE_6:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R12C25B.CLK:4.199">        OSC.OSC to R12C25B.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.452,R12C25B.CLK,R12C25B.Q1,PWM1/SLICE_6:ROUTE, 5.129,R12C25B.Q1,62.PADDO,PWMOutP4_c:DOPAD_DEL, 3.448,62.PADDO,62.PAD,PWMOutP2">Data path</A> PWM1/SLICE_6 to PWMOutP2:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452    R12C25B.CLK to     R12C25B.Q1 <A href="#@comp:PWM1/SLICE_6">PWM1/SLICE_6</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         6     5.129<A href="#@net:PWMOutP4_c:R12C25B.Q1:62.PADDO:5.129">     R12C25B.Q1 to 62.PADDO      </A> <A href="#@net:PWMOutP4_c">PWMOutP4_c</A>
DOPAD_DEL   ---     3.448       62.PADDO to         62.PAD <A href="#@comp:PWMOutP2">PWMOutP2</A>
                  --------
                    9.029   (43.2% logic, 56.8% route), 2 logic levels.


Passed:  The following path meets requirements by 6.806ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:PWM1/SLICE_6">PWM1/PWMOut_15</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:PWMOutP1">PWMOutP1</A>

   Data Path Delay:     8.995ns  (43.4% logic, 56.6% route), 2 logic levels.

   Clock Path Delay:    4.199ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      4.199ns delay OSCH_inst to PWM1/SLICE_6 and
      8.995ns delay PWM1/SLICE_6 to PWMOutP1 (totaling 13.194ns) meets
     20.000ns offset OSCH_inst to PWMOutP1 by 6.806ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 4.199,OSC.OSC,R12C25B.CLK,osc_clk">Clock path</A> OSCH_inst to PWM1/SLICE_6:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R12C25B.CLK:4.199">        OSC.OSC to R12C25B.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.452,R12C25B.CLK,R12C25B.Q1,PWM1/SLICE_6:ROUTE, 5.095,R12C25B.Q1,61.PADDO,PWMOutP4_c:DOPAD_DEL, 3.448,61.PADDO,61.PAD,PWMOutP1">Data path</A> PWM1/SLICE_6 to PWMOutP1:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452    R12C25B.CLK to     R12C25B.Q1 <A href="#@comp:PWM1/SLICE_6">PWM1/SLICE_6</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         6     5.095<A href="#@net:PWMOutP4_c:R12C25B.Q1:61.PADDO:5.095">     R12C25B.Q1 to 61.PADDO      </A> <A href="#@net:PWMOutP4_c">PWMOutP4_c</A>
DOPAD_DEL   ---     3.448       61.PADDO to         61.PAD <A href="#@comp:PWMOutP1">PWMOutP1</A>
                  --------
                    8.995   (43.4% logic, 56.6% route), 2 logic levels.


Passed:  The following path meets requirements by 7.315ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:PWM1/SLICE_6">PWM1/PWMOut_15</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:PWMOutN4">PWMOutN4</A>

   Data Path Delay:     8.486ns  (51.8% logic, 48.2% route), 3 logic levels.

   Clock Path Delay:    4.199ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      4.199ns delay OSCH_inst to PWM1/SLICE_6 and
      8.486ns delay PWM1/SLICE_6 to PWMOutN4 (totaling 12.685ns) meets
     20.000ns offset OSCH_inst to PWMOutN4 by 7.315ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 4.199,OSC.OSC,R12C25B.CLK,osc_clk">Clock path</A> OSCH_inst to PWM1/SLICE_6:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R12C25B.CLK:4.199">        OSC.OSC to R12C25B.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.452,R12C25B.CLK,R12C25B.Q1,PWM1/SLICE_6:ROUTE, 3.259,R12C25B.Q1,R25C38B.C0,PWMOutP4_c:CTOF_DEL, 0.495,R25C38B.C0,R25C38B.F0,SLICE_2495:ROUTE, 0.832,R25C38B.F0,71.PADDO,PWMOutN4_c:DOPAD_DEL, 3.448,71.PADDO,71.PAD,PWMOutN4">Data path</A> PWM1/SLICE_6 to PWMOutN4:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452    R12C25B.CLK to     R12C25B.Q1 <A href="#@comp:PWM1/SLICE_6">PWM1/SLICE_6</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         6     3.259<A href="#@net:PWMOutP4_c:R12C25B.Q1:R25C38B.C0:3.259">     R12C25B.Q1 to R25C38B.C0    </A> <A href="#@net:PWMOutP4_c">PWMOutP4_c</A>
CTOF_DEL    ---     0.495     R25C38B.C0 to     R25C38B.F0 <A href="#@comp:SLICE_2495">SLICE_2495</A>
ROUTE         4     0.832<A href="#@net:PWMOutN4_c:R25C38B.F0:71.PADDO:0.832">     R25C38B.F0 to 71.PADDO      </A> <A href="#@net:PWMOutN4_c">PWMOutN4_c</A>
DOPAD_DEL   ---     3.448       71.PADDO to         71.PAD <A href="#@comp:PWMOutN4">PWMOutN4</A>
                  --------
                    8.486   (51.8% logic, 48.2% route), 3 logic levels.


Passed:  The following path meets requirements by 7.315ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:PWM1/SLICE_6">PWM1/PWMOut_15</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:PWMOutN3">PWMOutN3</A>

   Data Path Delay:     8.486ns  (51.8% logic, 48.2% route), 3 logic levels.

   Clock Path Delay:    4.199ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      4.199ns delay OSCH_inst to PWM1/SLICE_6 and
      8.486ns delay PWM1/SLICE_6 to PWMOutN3 (totaling 12.685ns) meets
     20.000ns offset OSCH_inst to PWMOutN3 by 7.315ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 4.199,OSC.OSC,R12C25B.CLK,osc_clk">Clock path</A> OSCH_inst to PWM1/SLICE_6:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R12C25B.CLK:4.199">        OSC.OSC to R12C25B.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.452,R12C25B.CLK,R12C25B.Q1,PWM1/SLICE_6:ROUTE, 3.259,R12C25B.Q1,R25C38B.C0,PWMOutP4_c:CTOF_DEL, 0.495,R25C38B.C0,R25C38B.F0,SLICE_2495:ROUTE, 0.832,R25C38B.F0,70.PADDO,PWMOutN4_c:DOPAD_DEL, 3.448,70.PADDO,70.PAD,PWMOutN3">Data path</A> PWM1/SLICE_6 to PWMOutN3:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452    R12C25B.CLK to     R12C25B.Q1 <A href="#@comp:PWM1/SLICE_6">PWM1/SLICE_6</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         6     3.259<A href="#@net:PWMOutP4_c:R12C25B.Q1:R25C38B.C0:3.259">     R12C25B.Q1 to R25C38B.C0    </A> <A href="#@net:PWMOutP4_c">PWMOutP4_c</A>
CTOF_DEL    ---     0.495     R25C38B.C0 to     R25C38B.F0 <A href="#@comp:SLICE_2495">SLICE_2495</A>
ROUTE         4     0.832<A href="#@net:PWMOutN4_c:R25C38B.F0:70.PADDO:0.832">     R25C38B.F0 to 70.PADDO      </A> <A href="#@net:PWMOutN4_c">PWMOutN4_c</A>
DOPAD_DEL   ---     3.448       70.PADDO to         70.PAD <A href="#@comp:PWMOutN3">PWMOutN3</A>
                  --------
                    8.486   (51.8% logic, 48.2% route), 3 logic levels.


Passed:  The following path meets requirements by 7.638ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:CIC1Sin/SLICE_2222">CIC1Sin/d_out_i0_i10</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:MYLED[4]">MYLED[4]</A>

   Data Path Delay:     8.163ns  (39.8% logic, 60.2% route), 2 logic levels.

   Clock Path Delay:    4.199ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      4.199ns delay OSCH_inst to CIC1Sin/SLICE_2222 and
      8.163ns delay CIC1Sin/SLICE_2222 to MYLED[4] (totaling 12.362ns) meets
     20.000ns offset OSCH_inst to MYLED[4] by 7.638ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 4.199,OSC.OSC,R9C21D.CLK,osc_clk">Clock path</A> OSCH_inst to CIC1Sin/SLICE_2222:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     4.199<A href="#@net:osc_clk:OSC.OSC:R9C21D.CLK:4.199">        OSC.OSC to R9C21D.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    4.199   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.452,R9C21D.CLK,R9C21D.Q0,CIC1Sin/SLICE_2222:ROUTE, 4.914,R9C21D.Q0,104.PADDO,MYLED_c_4:DOPAD_DEL, 2.797,104.PADDO,104.PAD,MYLED[4]">Data path</A> CIC1Sin/SLICE_2222 to MYLED[4]:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.452     R9C21D.CLK to      R9C21D.Q0 <A href="#@comp:CIC1Sin/SLICE_2222">CIC1Sin/SLICE_2222</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         2     4.914<A href="#@net:MYLED_c_4:R9C21D.Q0:104.PADDO:4.914">      R9C21D.Q0 to 104.PADDO     </A> <A href="#@net:MYLED_c_4">MYLED_c_4</A>
DOPAD_DEL   ---     2.797      104.PADDO to        104.PAD <A href="#@comp:MYLED[4]">MYLED[4]</A>
                  --------
                    8.163   (39.8% logic, 60.2% route), 2 logic levels.

Report:   14.721ns is the minimum offset for this preference.


</A><A name="CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk"></A>================================================================================
Preference: CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET "osc_clk" ; Hold Analysis.
            10 items scored, 0 timing errors detected.
--------------------------------------------------------------------------------


Passed:  The following path meets requirements by 8.658ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:CIC1Sin/SLICE_2220">CIC1Sin/d_out_i0_i6</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:MYLED[0]">MYLED[0]</A>

   Data Path Delay:     5.004ns  (60.0% logic, 40.0% route), 2 logic levels.

   Clock Path Delay:    3.654ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      3.654ns delay OSCH_inst to CIC1Sin/SLICE_2220 and
      5.004ns delay CIC1Sin/SLICE_2220 to MYLED[0] (totaling 8.658ns) meets
      0.000ns hold offset OSCH_inst to MYLED[0] by 8.658ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 3.654,OSC.OSC,R9C23D.CLK,osc_clk">Clock path</A> OSCH_inst to CIC1Sin/SLICE_2220:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     3.654<A href="#@net:osc_clk:OSC.OSC:R9C23D.CLK:3.654">        OSC.OSC to R9C23D.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    3.654   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.392,R9C23D.CLK,R9C23D.Q0,CIC1Sin/SLICE_2220:ROUTE, 2.001,R9C23D.Q0,97.PADDO,MYLED_c_0:DOPAD_DEL, 2.611,97.PADDO,97.PAD,MYLED[0]">Data path</A> CIC1Sin/SLICE_2220 to MYLED[0]:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.392     R9C23D.CLK to      R9C23D.Q0 <A href="#@comp:CIC1Sin/SLICE_2220">CIC1Sin/SLICE_2220</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         2     2.001<A href="#@net:MYLED_c_0:R9C23D.Q0:97.PADDO:2.001">      R9C23D.Q0 to 97.PADDO      </A> <A href="#@net:MYLED_c_0">MYLED_c_0</A>
DOPAD_DEL   ---     2.611       97.PADDO to         97.PAD <A href="#@comp:MYLED[0]">MYLED[0]</A>
                  --------
                    5.004   (60.0% logic, 40.0% route), 2 logic levels.


Passed:  The following path meets requirements by 8.810ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:Mixer1/SLICE_2225">Mixer1/RFInR1_13</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:DiffOut">DiffOut</A>

   Data Path Delay:     5.156ns  (70.1% logic, 29.9% route), 2 logic levels.

   Clock Path Delay:    3.654ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      3.654ns delay OSCH_inst to Mixer1/SLICE_2225 and
      5.156ns delay Mixer1/SLICE_2225 to DiffOut (totaling 8.810ns) meets
      0.000ns hold offset OSCH_inst to DiffOut by 8.810ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 3.654,OSC.OSC,R2C19A.CLK,osc_clk">Clock path</A> OSCH_inst to Mixer1/SLICE_2225:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     3.654<A href="#@net:osc_clk:OSC.OSC:R2C19A.CLK:3.654">        OSC.OSC to R2C19A.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    3.654   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.392,R2C19A.CLK,R2C19A.Q1,Mixer1/SLICE_2225:ROUTE, 1.544,R2C19A.Q1,122.PADDO,DiffOut_c:DOPAD_DEL, 3.220,122.PADDO,122.PAD,DiffOut">Data path</A> Mixer1/SLICE_2225 to DiffOut:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.392     R2C19A.CLK to      R2C19A.Q1 <A href="#@comp:Mixer1/SLICE_2225">Mixer1/SLICE_2225</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         2     1.544<A href="#@net:DiffOut_c:R2C19A.Q1:122.PADDO:1.544">      R2C19A.Q1 to 122.PADDO     </A> <A href="#@net:DiffOut_c">DiffOut_c</A>
DOPAD_DEL   ---     3.220      122.PADDO to        122.PAD <A href="#@comp:DiffOut">DiffOut</A>
                  --------
                    5.156   (70.1% logic, 29.9% route), 2 logic levels.


Passed:  The following path meets requirements by 9.106ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:CIC1Sin/SLICE_2223">CIC1Sin/d_out_i0_i11</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:MYLED[5]">MYLED[5]</A>

   Data Path Delay:     5.452ns  (55.1% logic, 44.9% route), 2 logic levels.

   Clock Path Delay:    3.654ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      3.654ns delay OSCH_inst to CIC1Sin/SLICE_2223 and
      5.452ns delay CIC1Sin/SLICE_2223 to MYLED[5] (totaling 9.106ns) meets
      0.000ns hold offset OSCH_inst to MYLED[5] by 9.106ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 3.654,OSC.OSC,R9C22D.CLK,osc_clk">Clock path</A> OSCH_inst to CIC1Sin/SLICE_2223:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     3.654<A href="#@net:osc_clk:OSC.OSC:R9C22D.CLK:3.654">        OSC.OSC to R9C22D.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    3.654   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.392,R9C22D.CLK,R9C22D.Q0,CIC1Sin/SLICE_2223:ROUTE, 2.449,R9C22D.Q0,105.PADDO,MYLED_c_5:DOPAD_DEL, 2.611,105.PADDO,105.PAD,MYLED[5]">Data path</A> CIC1Sin/SLICE_2223 to MYLED[5]:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.392     R9C22D.CLK to      R9C22D.Q0 <A href="#@comp:CIC1Sin/SLICE_2223">CIC1Sin/SLICE_2223</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         2     2.449<A href="#@net:MYLED_c_5:R9C22D.Q0:105.PADDO:2.449">      R9C22D.Q0 to 105.PADDO     </A> <A href="#@net:MYLED_c_5">MYLED_c_5</A>
DOPAD_DEL   ---     2.611      105.PADDO to        105.PAD <A href="#@comp:MYLED[5]">MYLED[5]</A>
                  --------
                    5.452   (55.1% logic, 44.9% route), 2 logic levels.


Passed:  The following path meets requirements by 9.615ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:CIC1Sin/SLICE_2220">CIC1Sin/d_out_i0_i7</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:MYLED[1]">MYLED[1]</A>

   Data Path Delay:     5.961ns  (50.4% logic, 49.6% route), 2 logic levels.

   Clock Path Delay:    3.654ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      3.654ns delay OSCH_inst to CIC1Sin/SLICE_2220 and
      5.961ns delay CIC1Sin/SLICE_2220 to MYLED[1] (totaling 9.615ns) meets
      0.000ns hold offset OSCH_inst to MYLED[1] by 9.615ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 3.654,OSC.OSC,R9C23D.CLK,osc_clk">Clock path</A> OSCH_inst to CIC1Sin/SLICE_2220:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     3.654<A href="#@net:osc_clk:OSC.OSC:R9C23D.CLK:3.654">        OSC.OSC to R9C23D.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    3.654   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.392,R9C23D.CLK,R9C23D.Q1,CIC1Sin/SLICE_2220:ROUTE, 2.958,R9C23D.Q1,98.PADDO,MYLED_c_1:DOPAD_DEL, 2.611,98.PADDO,98.PAD,MYLED[1]">Data path</A> CIC1Sin/SLICE_2220 to MYLED[1]:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.392     R9C23D.CLK to      R9C23D.Q1 <A href="#@comp:CIC1Sin/SLICE_2220">CIC1Sin/SLICE_2220</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         2     2.958<A href="#@net:MYLED_c_1:R9C23D.Q1:98.PADDO:2.958">      R9C23D.Q1 to 98.PADDO      </A> <A href="#@net:MYLED_c_1">MYLED_c_1</A>
DOPAD_DEL   ---     2.611       98.PADDO to         98.PAD <A href="#@comp:MYLED[1]">MYLED[1]</A>
                  --------
                    5.961   (50.4% logic, 49.6% route), 2 logic levels.


Passed:  The following path meets requirements by 9.962ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:CIC1Sin/SLICE_2221">CIC1Sin/d_out_i0_i9</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:MYLED[3]">MYLED[3]</A>

   Data Path Delay:     6.308ns  (47.6% logic, 52.4% route), 2 logic levels.

   Clock Path Delay:    3.654ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      3.654ns delay OSCH_inst to CIC1Sin/SLICE_2221 and
      6.308ns delay CIC1Sin/SLICE_2221 to MYLED[3] (totaling 9.962ns) meets
      0.000ns hold offset OSCH_inst to MYLED[3] by 9.962ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 3.654,OSC.OSC,R9C22B.CLK,osc_clk">Clock path</A> OSCH_inst to CIC1Sin/SLICE_2221:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     3.654<A href="#@net:osc_clk:OSC.OSC:R9C22B.CLK:3.654">        OSC.OSC to R9C22B.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    3.654   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.392,R9C22B.CLK,R9C22B.Q1,CIC1Sin/SLICE_2221:ROUTE, 3.305,R9C22B.Q1,100.PADDO,MYLED_c_3:DOPAD_DEL, 2.611,100.PADDO,100.PAD,MYLED[3]">Data path</A> CIC1Sin/SLICE_2221 to MYLED[3]:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.392     R9C22B.CLK to      R9C22B.Q1 <A href="#@comp:CIC1Sin/SLICE_2221">CIC1Sin/SLICE_2221</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         2     3.305<A href="#@net:MYLED_c_3:R9C22B.Q1:100.PADDO:3.305">      R9C22B.Q1 to 100.PADDO     </A> <A href="#@net:MYLED_c_3">MYLED_c_3</A>
DOPAD_DEL   ---     2.611      100.PADDO to        100.PAD <A href="#@comp:MYLED[3]">MYLED[3]</A>
                  --------
                    6.308   (47.6% logic, 52.4% route), 2 logic levels.


Passed:  The following path meets requirements by 10.086ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:CIC1Sin/SLICE_2221">CIC1Sin/d_out_i0_i8</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:MYLED[2]">MYLED[2]</A>

   Data Path Delay:     6.432ns  (46.7% logic, 53.3% route), 2 logic levels.

   Clock Path Delay:    3.654ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      3.654ns delay OSCH_inst to CIC1Sin/SLICE_2221 and
      6.432ns delay CIC1Sin/SLICE_2221 to MYLED[2] (totaling 10.086ns) meets
      0.000ns hold offset OSCH_inst to MYLED[2] by 10.086ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 3.654,OSC.OSC,R9C22B.CLK,osc_clk">Clock path</A> OSCH_inst to CIC1Sin/SLICE_2221:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     3.654<A href="#@net:osc_clk:OSC.OSC:R9C22B.CLK:3.654">        OSC.OSC to R9C22B.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    3.654   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.392,R9C22B.CLK,R9C22B.Q0,CIC1Sin/SLICE_2221:ROUTE, 3.429,R9C22B.Q0,99.PADDO,MYLED_c_2:DOPAD_DEL, 2.611,99.PADDO,99.PAD,MYLED[2]">Data path</A> CIC1Sin/SLICE_2221 to MYLED[2]:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.392     R9C22B.CLK to      R9C22B.Q0 <A href="#@comp:CIC1Sin/SLICE_2221">CIC1Sin/SLICE_2221</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         2     3.429<A href="#@net:MYLED_c_2:R9C22B.Q0:99.PADDO:3.429">      R9C22B.Q0 to 99.PADDO      </A> <A href="#@net:MYLED_c_2">MYLED_c_2</A>
DOPAD_DEL   ---     2.611       99.PADDO to         99.PAD <A href="#@comp:MYLED[2]">MYLED[2]</A>
                  --------
                    6.432   (46.7% logic, 53.3% route), 2 logic levels.


Passed:  The following path meets requirements by 10.751ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:CIC1Sin/SLICE_2222">CIC1Sin/d_out_i0_i10</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:MYLED[4]">MYLED[4]</A>

   Data Path Delay:     7.097ns  (42.3% logic, 57.7% route), 2 logic levels.

   Clock Path Delay:    3.654ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      3.654ns delay OSCH_inst to CIC1Sin/SLICE_2222 and
      7.097ns delay CIC1Sin/SLICE_2222 to MYLED[4] (totaling 10.751ns) meets
      0.000ns hold offset OSCH_inst to MYLED[4] by 10.751ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 3.654,OSC.OSC,R9C21D.CLK,osc_clk">Clock path</A> OSCH_inst to CIC1Sin/SLICE_2222:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     3.654<A href="#@net:osc_clk:OSC.OSC:R9C21D.CLK:3.654">        OSC.OSC to R9C21D.CLK    </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    3.654   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.392,R9C21D.CLK,R9C21D.Q0,CIC1Sin/SLICE_2222:ROUTE, 4.094,R9C21D.Q0,104.PADDO,MYLED_c_4:DOPAD_DEL, 2.611,104.PADDO,104.PAD,MYLED[4]">Data path</A> CIC1Sin/SLICE_2222 to MYLED[4]:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.392     R9C21D.CLK to      R9C21D.Q0 <A href="#@comp:CIC1Sin/SLICE_2222">CIC1Sin/SLICE_2222</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         2     4.094<A href="#@net:MYLED_c_4:R9C21D.Q0:104.PADDO:4.094">      R9C21D.Q0 to 104.PADDO     </A> <A href="#@net:MYLED_c_4">MYLED_c_4</A>
DOPAD_DEL   ---     2.611      104.PADDO to        104.PAD <A href="#@comp:MYLED[4]">MYLED[4]</A>
                  --------
                    7.097   (42.3% logic, 57.7% route), 2 logic levels.


Passed:  The following path meets requirements by 10.842ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:PWM1/SLICE_6">PWM1/PWMOut_15</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:PWMOutP3">PWMOutP3</A>

   Data Path Delay:     7.188ns  (50.3% logic, 49.7% route), 2 logic levels.

   Clock Path Delay:    3.654ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      3.654ns delay OSCH_inst to PWM1/SLICE_6 and
      7.188ns delay PWM1/SLICE_6 to PWMOutP3 (totaling 10.842ns) meets
      0.000ns hold offset OSCH_inst to PWMOutP3 by 10.842ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 3.654,OSC.OSC,R12C25B.CLK,osc_clk">Clock path</A> OSCH_inst to PWM1/SLICE_6:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     3.654<A href="#@net:osc_clk:OSC.OSC:R12C25B.CLK:3.654">        OSC.OSC to R12C25B.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    3.654   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.392,R12C25B.CLK,R12C25B.Q1,PWM1/SLICE_6:ROUTE, 3.576,R12C25B.Q1,68.PADDO,PWMOutP4_c:DOPAD_DEL, 3.220,68.PADDO,68.PAD,PWMOutP3">Data path</A> PWM1/SLICE_6 to PWMOutP3:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.392    R12C25B.CLK to     R12C25B.Q1 <A href="#@comp:PWM1/SLICE_6">PWM1/SLICE_6</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         6     3.576<A href="#@net:PWMOutP4_c:R12C25B.Q1:68.PADDO:3.576">     R12C25B.Q1 to 68.PADDO      </A> <A href="#@net:PWMOutP4_c">PWMOutP4_c</A>
DOPAD_DEL   ---     3.220       68.PADDO to         68.PAD <A href="#@comp:PWMOutP3">PWMOutP3</A>
                  --------
                    7.188   (50.3% logic, 49.7% route), 2 logic levels.


Passed:  The following path meets requirements by 10.842ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:PWM1/SLICE_6">PWM1/PWMOut_15</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:PWMOutP4">PWMOutP4</A>

   Data Path Delay:     7.188ns  (50.3% logic, 49.7% route), 2 logic levels.

   Clock Path Delay:    3.654ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      3.654ns delay OSCH_inst to PWM1/SLICE_6 and
      7.188ns delay PWM1/SLICE_6 to PWMOutP4 (totaling 10.842ns) meets
      0.000ns hold offset OSCH_inst to PWMOutP4 by 10.842ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 3.654,OSC.OSC,R12C25B.CLK,osc_clk">Clock path</A> OSCH_inst to PWM1/SLICE_6:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     3.654<A href="#@net:osc_clk:OSC.OSC:R12C25B.CLK:3.654">        OSC.OSC to R12C25B.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    3.654   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.392,R12C25B.CLK,R12C25B.Q1,PWM1/SLICE_6:ROUTE, 3.576,R12C25B.Q1,69.PADDO,PWMOutP4_c:DOPAD_DEL, 3.220,69.PADDO,69.PAD,PWMOutP4">Data path</A> PWM1/SLICE_6 to PWMOutP4:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.392    R12C25B.CLK to     R12C25B.Q1 <A href="#@comp:PWM1/SLICE_6">PWM1/SLICE_6</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         6     3.576<A href="#@net:PWMOutP4_c:R12C25B.Q1:69.PADDO:3.576">     R12C25B.Q1 to 69.PADDO      </A> <A href="#@net:PWMOutP4_c">PWMOutP4_c</A>
DOPAD_DEL   ---     3.220       69.PADDO to         69.PAD <A href="#@comp:PWMOutP4">PWMOutP4</A>
                  --------
                    7.188   (50.3% logic, 49.7% route), 2 logic levels.


Passed:  The following path meets requirements by 11.033ns

 Logical Details:  Cell type  Pin type       Cell/ASIC name  (clock net +/-)

   Source:         FF         Q              <A href="#@comp:PWM1/SLICE_6">PWM1/PWMOut_15</A>  (from <A href="#@net:osc_clk">osc_clk</A> +)
   Destination:    Port       Pad            <A href="#@comp:PWMOutN3">PWMOutN3</A>

   Data Path Delay:     7.379ns  (53.9% logic, 46.1% route), 3 logic levels.

   Clock Path Delay:    3.654ns  (0.0% logic, 100.0% route), 0 logic levels.

 Constraint Details:
      3.654ns delay OSCH_inst to PWM1/SLICE_6 and
      7.379ns delay PWM1/SLICE_6 to PWMOutN3 (totaling 11.033ns) meets
      0.000ns hold offset OSCH_inst to PWMOutN3 by 11.033ns

 Physical Path Details:

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:ROUTE, 3.654,OSC.OSC,R12C25B.CLK,osc_clk">Clock path</A> OSCH_inst to PWM1/SLICE_6:

   Name    Fanout   Delay (ns)          Site               Resource
ROUTE       999     3.654<A href="#@net:osc_clk:OSC.OSC:R12C25B.CLK:3.654">        OSC.OSC to R12C25B.CLK   </A> <A href="#@net:osc_clk">osc_clk</A>
                  --------
                    3.654   (0.0% logic, 100.0% route), 0 logic levels.

      <A href="#@path:CLOCK_TO_OUT ALLPORTS 20.000000 ns CLKNET 'osc_clk' ;:REG_DEL, 0.392,R12C25B.CLK,R12C25B.Q1,PWM1/SLICE_6:ROUTE, 2.727,R12C25B.Q1,R25C38B.C0,PWMOutP4_c:CTOF_DEL, 0.367,R25C38B.C0,R25C38B.F0,SLICE_2495:ROUTE, 0.673,R25C38B.F0,70.PADDO,PWMOutN4_c:DOPAD_DEL, 3.220,70.PADDO,70.PAD,PWMOutN3">Data path</A> PWM1/SLICE_6 to PWMOutN3:

   Name    Fanout   Delay (ns)          Site               Resource
REG_DEL     ---     0.392    R12C25B.CLK to     R12C25B.Q1 <A href="#@comp:PWM1/SLICE_6">PWM1/SLICE_6</A> (from <A href="#@net:osc_clk">osc_clk</A>)
ROUTE         6     2.727<A href="#@net:PWMOutP4_c:R12C25B.Q1:R25C38B.C0:2.727">     R12C25B.Q1 to R25C38B.C0    </A> <A href="#@net:PWMOutP4_c">PWMOutP4_c</A>
CTOF_DEL    ---     0.367     R25C38B.C0 to     R25C38B.F0 <A href="#@comp:SLICE_2495">SLICE_2495</A>
ROUTE         4     0.673<A href="#@net:PWMOutN4_c:R25C38B.F0:70.PADDO:0.673">     R25C38B.F0 to 70.PADDO      </A> <A href="#@net:PWMOutN4_c">PWMOutN4_c</A>
DOPAD_DEL   ---     3.220       70.PADDO to         70.PAD <A href="#@comp:PWMOutN3">PWMOutN3</A>
                  --------
                    7.379   (53.9% logic, 46.1% route), 3 logic levels.

Report:    8.658ns is the maximum offset for this preference.

<A name="Report Summary"></A><B><U><big>Report Summary</big></U></B>
--------------
----------------------------------------------------------------------------
Preference                              |   Constraint|       Actual|Levels
----------------------------------------------------------------------------
                                        |             |             |
FREQUENCY NET "osc_clk" 88.670000 MHz ; |   88.670 MHz|   66.007 MHz|  35 *
                                        |             |             |
CLOCK_TO_OUT ALLPORTS 20.000000 ns      |             |             |
CLKNET "osc_clk" ; Setup Analysis.      |    20.000 ns|    14.721 ns|   2  
                                        |             |             |
CLOCK_TO_OUT ALLPORTS 20.000000 ns      |             |             |
CLKNET "osc_clk" ; Hold Analysis.       |     0.000 ns|     8.658 ns|   2  
                                        |             |             |
----------------------------------------------------------------------------


1 preference(marked by "*" above) not met.

----------------------------------------------------------------------------
Critical Nets                           |   Loads|  Errors| % of total
----------------------------------------------------------------------------
n10998                                  |       1|      10|    100.00%
                                        |        |        |
n10999                                  |       1|      10|    100.00%
                                        |        |        |
n11000                                  |       1|      10|    100.00%
                                        |        |        |
n11001                                  |       1|      10|    100.00%
                                        |        |        |
n11002                                  |       1|      10|    100.00%
                                        |        |        |
n11003                                  |       1|      10|    100.00%
                                        |        |        |
n11004                                  |       1|      10|    100.00%
                                        |        |        |
n11005                                  |       1|      10|    100.00%
                                        |        |        |
n11006                                  |       1|      10|    100.00%
                                        |        |        |
n11007                                  |       1|      10|    100.00%
                                        |        |        |
n11008                                  |       1|      10|    100.00%
                                        |        |        |
n11009                                  |       1|       9|     90.00%
                                        |        |        |
n10981                                  |       1|       8|     80.00%
                                        |        |        |
n10982                                  |       1|       8|     80.00%
                                        |        |        |
n10983                                  |       1|       8|     80.00%
                                        |        |        |
n10984                                  |       1|       8|     80.00%
                                        |        |        |
n10985                                  |       1|       8|     80.00%
                                        |        |        |
n10986                                  |       1|       8|     80.00%
                                        |        |        |
n10987                                  |       1|       8|     80.00%
                                        |        |        |
n10988                                  |       1|       8|     80.00%
                                        |        |        |
n10989                                  |       1|       8|     80.00%
                                        |        |        |
n10990                                  |       1|       8|     80.00%
                                        |        |        |
n10991                                  |       1|       8|     80.00%
                                        |        |        |
n10992                                  |       1|       8|     80.00%
                                        |        |        |
n10993                                  |       1|       8|     80.00%
                                        |        |        |
n10994                                  |       1|       8|     80.00%
                                        |        |        |
n10995                                  |       1|       8|     80.00%
                                        |        |        |
n10996                                  |       1|       8|     80.00%
                                        |        |        |
n10997                                  |       1|       8|     80.00%
                                        |        |        |
n8250                                   |       4|       8|     80.00%
                                        |        |        |
o_Rx_DV                                 |       4|       8|     80.00%
                                        |        |        |
n12533                                  |       5|       7|     70.00%
                                        |        |        |
n2817                                   |       1|       6|     60.00%
                                        |        |        |
n13057                                  |      52|       6|     60.00%
                                        |        |        |
n2358                                   |       1|       4|     40.00%
                                        |        |        |
n10979                                  |       1|       3|     30.00%
                                        |        |        |
n10980                                  |       1|       3|     30.00%
                                        |        |        |
n2818                                   |       1|       3|     30.00%
                                        |        |        |
n2361                                   |       1|       3|     30.00%
                                        |        |        |
n10808                                  |       1|       2|     20.00%
                                        |        |        |
n10809                                  |       1|       2|     20.00%
                                        |        |        |
n10810                                  |       1|       2|     20.00%
                                        |        |        |
n10811                                  |       1|       2|     20.00%
                                        |        |        |
n10812                                  |       1|       2|     20.00%
                                        |        |        |
n10813                                  |       1|       2|     20.00%
                                        |        |        |
n10814                                  |       1|       2|     20.00%
                                        |        |        |
n10815                                  |       1|       2|     20.00%
                                        |        |        |
n10816                                  |       1|       2|     20.00%
                                        |        |        |
n10817                                  |       1|       2|     20.00%
                                        |        |        |
n10818                                  |       1|       2|     20.00%
                                        |        |        |
n10819                                  |       1|       2|     20.00%
                                        |        |        |
n10820                                  |       1|       2|     20.00%
                                        |        |        |
n10821                                  |       1|       2|     20.00%
                                        |        |        |
n10822                                  |       1|       2|     20.00%
                                        |        |        |
n10823                                  |       1|       2|     20.00%
                                        |        |        |
phase_inc_carrGen_5                     |       4|       2|     20.00%
                                        |        |        |
n1056                                   |       1|       2|     20.00%
                                        |        |        |
n2324                                   |       1|       2|     20.00%
                                        |        |        |
n7813                                   |       1|       2|     20.00%
                                        |        |        |
----------------------------------------------------------------------------


<A name="Clock Domains Analysis"></A><B><U><big>Clock Domains Analysis</big></U></B>
------------------------

Found 3 clocks:

Clock Domain: <A href="#@net:uart_rx1/UartClk[2]">uart_rx1/UartClk[2]</A>   Source: uart_rx1/SLICE_12.Q1   Loads: 29
   No transfer within this clock domain is found

Clock Domain: <A href="#@net:osc_clk">osc_clk</A>   Source: OSCH_inst.OSC   Loads: 1369
   Covered under: FREQUENCY NET "osc_clk" 88.670000 MHz ;

   Data transfers from:
   Clock Domain: <A href="#@net:uart_rx1/UartClk[2]">uart_rx1/UartClk[2]</A>   Source: uart_rx1/SLICE_12.Q1
      Covered under: FREQUENCY NET "osc_clk" 88.670000 MHz ;   Transfers: 9

   Clock Domain: <A href="#@net:CIC1_out_clkSin">CIC1_out_clkSin</A>   Source: CIC1Sin/SLICE_2199.Q0
      Covered under: FREQUENCY NET "osc_clk" 88.670000 MHz ;   Transfers: 10

Clock Domain: <A href="#@net:CIC1_out_clkSin">CIC1_out_clkSin</A>   Source: CIC1Sin/SLICE_2199.Q0   Loads: 153
   No transfer within this clock domain is found


Timing summary (Setup):
---------------

Timing errors: 10  Score: 37626
Cumulative negative slack: 37626

Constraints cover 1466874 paths, 1 nets, and 16495 connections (99.99% coverage)

